Principal Engineer
2 months ago
Exiciting Opportunity for Verification Engineers.
7+ Years of experience in IP/SoC level verification.
Must have Expertise:
1. Grounds up verification environment development using SV/ UVM is a must.
2. One of the high speed protocols like PCIe or USB 3 or MIPI.
3. Experience in test planning.
4. Experience in leading a team of 5+ Engineers.
5. Proficient in System Verilog and UVM.
Roles and Responsibilities:
Hands on Verification Lead for leading DV efforts of IP and Full Chip level Automotive Imaging chips starting from Test planning till delivery ownership of the team of 5 to 6 Engineers.
Ready to tackle challenging tasks and work on groundbreaking projects ? Sent your resume to harshita.p@acldigital.com
Regards,
Harshita Pant
Sr. Executive - TAG
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