SoC Design Verification Engineering Lead

We are currently seeking a highly experienced Full Chip Physical Design Lead to drive top-level physical design activities for complex, high-performance System-on-Chip (SoC) designs.This key position will be responsible for leading mid-sized engineering teams and collaborating cross-functionally to ensure consistency between block-level and top-level...

Job SummaryWe are seeking a seasoned Principal SoC Design Verification Methodology Expert to lead product development, validation and customer engagement.Key Responsibilities:Collaborate with cross-functional teams to define feature requirements.Develop and execute validation plans for features.Work with distributed teams to drive issues and features to...

Job SummaryWe are seeking a highly skilled Senior Design Verification Engineer to lead SOC design verification efforts for complex projects.Main Responsibilities:Developing and implementing comprehensive verification strategiesCreating test plans and test benches for high-speed SOCsHandling high-speed protocols like PCIe, Ethernet, CXL, MIPI, DDR, and HBMA...

About this Senior DFT Lead Engineer RoleWe are looking for a highly skilled and experienced Senior DFT Lead Engineer to take full ownership of PMBIST planning, insertion, verification, and closure.PMBIST architecture, integration, and verification ATPG, fault models, scan insertion, pattern debugging Coverage analysis and sign-off DFT design expertise with...

Job OpportunityWe are seeking a skilled professional to develop and execute comprehensive test plans for large-scale System-on-Chip (SoC) and subsystem verification using advanced emulation tools like Cadence Palladium.The ideal candidate will be responsible for building, debugging, and maintaining complex emulation environments, including transactors,...

Job OverviewWe are seeking a seasoned professional to spearhead our verification efforts.Main Responsibilities:Direct and manage complex verification projects, guaranteeing successful project execution.Develop comprehensive verification strategies for high-speed and low-speed peripherals and protocols.Conduct gate-level simulations and power-aware...

We are seeking a highly skilled DFT Engineer to join our team. This individual will be responsible for leading the design and implementation of digital fault tolerance (DFT) solutions for complex systems-on-chip (SoCs).About the job:This is an exciting opportunity to take ownership of PMBIST planning, insertion, verification, and closure. The ideal candidate...

Senior RTL Design EngineerWe are seeking a skilled Senior RTL Design Engineer to take on the challenge of designing and implementing complex digital circuits. The ideal candidate will possess 4-12 years of experience in logic design and RTL coding, with a strong background in SoC design and integration for intricate SoCs.Key Responsibilities:Design,...

Job OverviewThe Lead DFT Engineer position drives innovation in digital fault tolerance architecture, spearheading planning and implementation across complex System-on-Chip (SoC) and Application-Specific Integrated Circuit (ASIC) designs.We are seeking a seasoned professional to define and execute DFT strategy, oversee the development and verification of DFT...

We are seeking an experienced DFT Engineer to play a key role in ensuring the testability and manufacturability of complex ASICs and SoCs.Key responsibilities include:Collaborating with design and verification engineers throughout the design flow to integrate DFT techniquesDeveloping comprehensive DFT strategies, including scan insertion, ATPG, and Boundary...