DFT Engineer

4 days ago

uttar pradesh, India Best NanoTech Full time

🔍 Role: DFT Engineer (Design for Testability)📍 Location: Noida💼 Experience: 7–10 years💰 Budget: Open / As per company standards🎓 Qualification: BE/ME/B.Tech/M.Tech from a reputed instituteWhat You’ll Work On:Implementation and verification of scan architectures, JTAG (Joint Test Action Group), boundary scan, Memory BIST, LBIST, and ATPG (Automatic Test Pattern Generation)Scan insertion, Design Rule Checking (DRC), and coverage analysisSimulation debug with timing/SDF and post-silicon debugVerilog/VHDL RTL coding, automation, and Mentor/Synopsys DFT toolsetsDebugging and root cause analysis for simulation and silicon-level failuresWhat We’re Looking For:Proven DFT experience across multiple SoC designs (end-to-end)Deep understanding of DFT methodologies and tool flowsSelf-driven, detail-oriented, and collaborative professionalExcellent analytical, debugging, and communication skillsA curious mindset — eager to learn, explore, and push design boundariesIf you’re ready to take on challenging design-for-test projects and contribute to world-class semiconductor solutions, we’d love to connect with you📩 Apply now or DM - gagan@bestnanotech.in

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