Senior Serdes Lead Engineer

4 days ago


bangalore, India Mulya Technologies Full time

Senior SerDes Leadwww.omnidesigntech.comLocation: Bengaluru About Omni Design TechnologiesOmni Design Technologies is a leading provider of high-performance, ultra-low power IP cores, from 28nm down through advanced FinFET nodes, which enable differentiated system-on-chip (SoC), in applications ranging from 5G, wireline and optical communications, LiDAR, radar, automotive networking, AI, image sensors, and the internet-of-things (IoT). Our data converter (ADC and DAC) IP cores range from 6-bit to 14-bit resolution and from a few MSPS to more than 100 GSPS sampling rates. Omni Design, founded in 2015 by semiconductor industry veterans, has an excellent track record of innovation and collaboration with customers to enable their success. The company is headquartered in Milpitas, California with additional design centers in Fort Collins-Colorado, Bangalore-India, Hyderabad-India, Dublin-Ireland, Boston-Massachusetts.Senior SerDes LeadFull-time /HybridSerDes Lead and development lead focused on PAM4 ADC and DAC based wireline technologies. The successful candidate in this role will work with customers to understand requirements, and will lead the development of high performance transistor level design starting from initial specification, through design and layout supervision, silicon evaluation and characterization to final product introduction to market. Qualifications10-20 years of experience in high-performance analog or mixed-signal IC development in advanced CMOS processesThorough familiarity with high-speed PAM4 architectures and topologiesExperience in designing high performance building block circuits such as bandgap reference, op-amp, comparators, oscillators, DLL, PLL, CTLEs, CDRs, etc.Thorough understanding of equalization techniques (both analog and digital) Must have a track record of successfully taking designs to productionAbility to work with customers to define products that address needsMust have experience with evaluating silicon on bench and familiarity with standard lab equipmentStrong intuitive and analytical understanding of transistor-level circuit design including noise and mismatch analysisExperience with analog and digital behavioral modeling, and/or synthesis of digital control blocksFamiliar with Cadence schematic capture, virtuoso, Spectre and/or HSPICE circuit simulation toolsMATLAB understanding would be preferred but not mandatoryFamiliar with designing circuits for electromigration and ESD compliance in submicron CMOS processMust be familiar with layout parasitic extraction tools and layout dependent impairments in advanced CMOS processesMust be able to work independently, create and adhere to schedulesMust possess strong written and verbal communication skills with an ability to work with teams spread across geographic locationsShould be able to seek help proactively as well as share and pass on knowledgeContact:UdayMulya Technologiesmuday_bhaskar@yahoo.com"Mining The Knowledge Community"



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