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Memory Circuit Designer Exp -5+ Transistor level circuit design on custom SRAM array Margin and corner analysis SPICE or FastSPICE simulations EMIR Functional verification – schematic vs. Verilog Cell timing and power characterization Collateral generation such as LIB, LEF, CMM, OAS Memory Mask Layout Designer Exp – 5+ Mask layout design on custom SRAM...

Memory Circuit Designer Exp -5+Transistor level circuit design on custom SRAM arrayMargin and corner analysisSPICE or FastSPICE simulationsEMIRFunctional verification – schematic vs. VerilogCell timing and power characterizationCollateral generation such as LIB, LEF, CMM, OASMemory Mask Layout Designer Exp – 5+Mask layout design on custom SRAM...

JD: Analog IP Lead (Analog circuit )1) Atleast 15+years of experience in entire Analog IP development including circuit design, layout, AMS verification and characterization2) Must have led the entire Analog IP development cycle and team3) Circuit Design implementation of IPs including LDOs, Band Gap reference, Current Generators, POR, ADC/DACs, PLLs,...

Hi, we have wonderful opportunityRole: C++ QML DeveloperLocation: BangaloreExperience: 5+yearsFulltimeNotice: Immediate Joiners onlyJD:· Perform requirements analysis activities· Design and development of screens QT/QML· Design and development of UI logic, using C/C++ programming· Create unit test procedures, integration test procedures, and functional...

Greetings from Wipro !!Wipro is currently hiring for enthusiastic Design verification engineers and the details are as below. Years of experience: 5 to 20 years.Area of expertise: system verilog and UVM, OVM, CPU verification, IP and SOC level verification.Positions: lead level Locations: Bangalore, Hyderabad. Job description:BE/ B.Tech/ Master degree in...

WIPRO IS HIRING !!!Dear Candidates,PFB JD, If suitable please share updated resume with below details,Location- AnyExperience - 7 - 10yrsLooking for early joiners (Max 30days)WEBMETHODS : Consultant• 6+yrs experience in WebMethods and strong B2B EXPEREINCE• Development experience on webMethods product suite V 9.x / 10.x (Integration Server, UM/Broker,...

Physical Design Manager:Exp-15+yrsLocation-BengaluruJob Description:Atleast 15+ years’ experience Able to technically lead team of 50+ engineers, manage multiple customers interaction and projects . Strong leadership quality and able to build and manage team and manage all kind of escalation . Customer front facing .Lead development organization to...

Responsibilities• Review existing company designs and understand communication standards• Establish a state-of-the-art AMS verification environment• Co-develop an AMS verification plan with Digital/Analog teams from chip specification• Execute plan and debug issues with team• Develop test benches and models• Provide feedback to design teams for...

Hi All,Greeting from WiproWe are looking for SAP SD+Vistex Consulta .Looking who have relevant exp in vistex.Who can join 30-40 days of time.Experience-5+years -9 yearsRegards,Mona

Hi, we have wonderful opportunity Role: C++ QML Developer Location: Bangalore Experience: 5+years Fulltime Notice: Immediate Joiners only JD: · Perform requirements analysis activities · Design and development of screens QT/QML · Design and development of UI logic, using C/C++ programming · Create unit test procedures, integration test procedures, and...

WIPRO IS HIRING !!! Dear Candidates, PFB JD, If suitable please share updated resume with below details, Location- Any Experience - 7 - 10yrs Looking for early joiners (Max 30days) WEBMETHODS : Consultant • 6+yrs experience in WebMethods and strong B2B EXPEREINCE • Development experience on webMethods product suite V 9.x / 10.x (Integration Server,...

Location : Bangalore, Hyderabad, Kochi, Pune Key Responsibilities: Interface with ASIC design teams to ensure DFT design rules and coverages are met. Generate high-quality manufacturing ATPG test patterns for stuck-at (SAF), transition fault (TDF) models through the use of on-chip test compression techniques. MBIST verification (including repair), test...

Job Description:1) Atleast 15+years of experience in entire Analog IP development including circuit design, layout, AMS verification and characterization2) Must have led the entire Analog IP development cycle and team3) Circuit Design implementation of IPs including LDOs, Band Gap reference, Current Generators, POR, ADC/DACs, PLLs, Oscillators, General...

Location : Bangalore, Hyderabad, Kochi, Pune Key Responsibilities:Interface with ASIC design teams to ensure DFT design rules and coverages are met.Generate high-quality manufacturing ATPG test patterns for stuck-at (SAF), transition fault (TDF) models through the use of on-chip test compression techniques.MBIST verification (including repair), test pattern...

Senior Physical Design Engineer:Exp-8+yrsKEY RESPONSIBILITIES:Lead the team responsible for Synthesis, Physical Design, timing and Physical closureManage a large team of internal and external resourcesResponsible for ensuring the completion of the SOC chip on schedule with high QORPhysical implementation of block level and subsystem levelContribute to...

Senior Physical Design Engineer: Exp-8+yrs KEY RESPONSIBILITIES: Lead the team responsible for Synthesis, Physical Design, timing and Physical closure Manage a large team of internal and external resources Responsible for ensuring the completion of the SOC chip on schedule with high QOR Physical implementation of block level and subsystem level Contribute...

Hi All Greetings from Wipro, Position –Generative AI Exp – 5 to10 years Notice period: Immediate to 30 Days Location: -Bangalore JD:Hands on experience in Gen AI space (Keeping up to date with new things in Gen AI space.)Experience in Co-Pilot Studio/copilot Experience on LLMs (Large Language Models)Experience in Python language and AWS/Azure/GCP

Hi All Greetings from Wipro, Position –Generative AI Exp – 5 to10 years Notice period: Immediate to 30 Days Location: -Bangalore JD: Hands on experience in Gen AI space (Keeping up to date with new things in Gen AI space.) Experience in Co-Pilot Studio/copilot Experience on LLMs (Large Language Models) Experience in Python language and...

Openings in Wipro for SAP SD in Bengaluru, Hyderabad, Chennai, Mumbai, Pune and BhubaneswarExperience : 7+ Years Relevant experience in SD is mandatory.Hands on experience in HANA is required.1 Implementation experience is mandatoryNotice Period : Immediate - 60 days Notice Period

Openings in Wipro for SAP SD in Bengaluru, Hyderabad, Chennai, Mumbai, Pune and Bhubaneswar Experience : 7+ Years Relevant experience in SD is mandatory. Hands on experience in HANA is required. 1 Implementation experience is mandatory Notice Period : Immediate - 60 days Notice Period