Layout Designer
1 day ago
This is Jr position., If you are meeting with below criteria means pls share your resume to karthik.ravichandran@hays.com.au with below details.. Over all experience; Relevant experience; CCTC; ECTC; Current location; Will you able to attend final round in F2F at Bangalore; Location; Bangalore Role; Custom Standard Cell Design Engineer Final round must be F2F. Job Description You will be responsible for the development of Arm custom standard cells in the latest, sub-3nm process technology nodes. You will work as part of a team that co-optimizes the circuit design with physical design engineers to improve the PPA of Arm cores that will be integrated into best-in-class SoCs. You will work in close collaboration with the mask design team to provide optimally tuned layout, characterize and model all standard libra Required Skills and Experience : 2+ years of relevant circuit design experience (for BSEE)1+ years of relevant circuit design experience (for MSEE) Experience in the identification, design and verification of cells specifically targeted to improve core and SoC level PPA In-depth understanding of MOSFET electrical characteristics, transistor level device physics, PPA trade-offs, layout and variability especially at 3nm and below technology nodes Expertise in transistor level design of static circuits including state retaining elements such as latches and flops Hands-on development of standard cell EDA view characterization, modeling and QA Experience with standard cell characterization tools and Spice circuit simulators Familiarity with scripting languages such as Perl or Python Be willing to iteratively improve designs and repeatedly attempt to develop solutions to difficult problems Demonstrate a positive attitude and respect for all members of the team Be motivated to continuously develop skills and accept various responsibilities as a part of contributing to Arm’s success Ability to analyze data and present conclusions effectively An engineer with 1–4 years of experience in standard cell or custom circuit design , strong knowledge of CMOS device physics and transistor-level design , and hands-on expertise in SPICE simulation and cell characterization tools like Cadence Liberate or Synopsys SiliconSmart . Skilled in Python/Perl scripting , familiar with advanced process nodes (≤5nm) , and capable of PPA optimization through close collaboration with layout and physical design teams.
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Layout Design Engineer
2 days ago
bangalore district, India KARMIC DESIGN PVT LTD Full timeJob Summary We are seeking a Senior Custom Layout Design Engineer with 5+ years of hands-on experience in analog/mixed-signal custom layout design. The ideal candidate should have strong expertise in high speed layout concepts and FinFET process nodes . You will be responsible for delivering high-quality layout designs and leading module-level layout...
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Analog Layout Engineer
1 day ago
bangalore district, India ACL Digital Full timeAnalog Layout Engineer Required Qualifications: Bachelor’s or Master’s degree in Electrical Engineering , Computer Engineering , or a related field. 4+ years of experience in analog layout design with a focus on TSMC 7nm , 5nm , and 3nm process technologies. Proficiency with Cadence Virtuoso , Mentor Graphics , Synopsys IC Compiler , or equivalent analog...
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Analog Layout Engineers
1 day ago
bangalore district, India ACL Digital Full timeAbout the job Job Title: Analog Layout Engineer Job Description: We are seeking a skilled and motivated Analog Layout Engineer to join our team. The ideal candidate will independently handle block-level and chip-level analog layout design while coordinating effectively with circuit designers and project leads. This is an exciting opportunity for individuals...
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Layout/Mask designer
2 days ago
hyderabad district, India SysTechCorp Inc Full timeJobTitle : Layout/Mask Designer 3_INR Location : Bangalore Role and Responsibilities: • Responsible for Design and development of critical analog, mixed-signal, custom digital block and full chip level integration support. • Perform layout verification like LVS/DRC/Antenna, quality check and documentation. • Responsible for on-time delivery of...
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Layout Design Engineer
3 days ago
bangalore, India KARMIC DESIGN PVT LTD Full timeJob SummaryWe are seeking a Senior Custom Layout Design Engineer with 5+ years of hands-on experience in analog/mixed-signal custom layout design. The ideal candidate should have strong expertise in high speed layout concepts and FinFET process nodes. You will be responsible for delivering high-quality layout designs and leading module-level layout...
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Layout Design Engineer
3 days ago
bangalore, India KARMIC DESIGN PVT LTD Full timeJob Summary We are seeking a Senior Custom Layout Design Engineer with 5+ years of hands-on experience in analog/mixed-signal custom layout design. The ideal candidate should have strong expertise in high speed layout concepts and FinFET process nodes . You will be responsible for delivering high-quality layout designs and leading module-level layout...
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Layout Design Engineer
2 days ago
bangalore, India KARMIC DESIGN PVT LTD Full timeJob Summary We are seeking a Senior Custom Layout Design Engineer with 5+ years of hands-on experience in analog/mixed-signal custom layout design. The ideal candidate should have strong expertise in high speed layout concepts and FinFET process nodes . You will be responsible for delivering high-quality layout designs and leading module-level layout...
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Layout Designer
6 days ago
bangalore, India Hays Full timeThis is Jr position., If you are meeting with below criteria means pls share your resume to with below details.. Over all experience; Relevant experience; CCTC; ECTC; Current location; Will you able to attend final round in F2F at Bangalore; Location; Bangalore Role; Custom Standard Cell Design Engineer Final round must be F2F. Job Description You will be...
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Layout Designer
2 weeks ago
bangalore, India Hays Full timeThis is Jr position., If you are meeting with below criteria means pls share your resume to karthik.ravichandran@hays.com.au with below details..Over all experience;Relevant experience;CCTC;ECTC;Current location;Will you able to attend final round in F2F at Bangalore;Location; Bangalore Role; Custom Standard Cell Design EngineerFinal round must be F2F. Job...
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Senior Analog Layout Engineers
2 days ago
bangalore district, India ACL Digital Full timeKey Responsibilities: Include the development and preparation of multi-dimensional layouts and detailed drawings of the semiconductor devices from schematics and related geometry provided by design engineering. Working on layout design of owned blocks with Cadence Virtuoso XL. Working on block and top-level level layout verification with Calibre. Extensive...
