Senior CPU Integration Design Verification Engineer

1 week ago

bangalore, India Mulya Technologies Full time

Description:

About Us:

We are at the forefront of the two hottest trends that are revolutionizing the semiconductor industry: RISC-V and Chiplet Architecture, well-funded and backed by some of the largest strategic investors in the industry with the goal of building best-in-class CPU cores for cloud, enterprise, 5G, and Edge computing. We invite you to join the revolution and contribute to one of the Hottest Semiconductor startups in the industry.


TITLE: Senior CPU Integration Design Verification Engineer

LOCATION: Greater Bengaluru Area

We are seeking an experienced verification engineer to lead verification efforts to integrate complex CPU subsystem IP into complete systems, based on the open-source RISC-V architecture. The right candidate will have deep technical expertise combined with strong leadership skills.

Responsibilities:

  • Lead top-level integration and system verification of CPU subsystems into systems, partnering with CPU and system architecture and design teams
  • Develop verification infrastructure in both simulation and emulation environments
  • Develop and execute comprehensive verification plans for system integration
  • Debug designs in simulation, prototyping platforms, and silicon
  • Continuously drive methodology improvements to improve efficiency
  • Mentor junior engineers to accomplish successful projects
  • Coordinate between multiple teams


Minimum Qualifications:

  • Bachelors or Masters degree in electrical, computer engineering or related field
  • BS+8 years or MS+10 years of industry experience successfully delivering CPU silicon


Skills & Qualifications Required:

  • SystemVerilog verification development experience
  • Testbench construction using UVM or analogous methodologies
  • Stimulus generation for system functionality and integration
  • Strong background in one or more common CPU ISAs. x86, ARM, MIPS, RISC-V, etc.
  • Strong background in CPU subsystem functionality such as MP programming and cache coherency and high-performance silicon system architecture
  • Specific knowledge of AMBA bus standards and UCIe are desired
  • Project experience throughout the project lifecycle
  • Demonstrated coordination experience with outstanding communication skills
  • Highly motivated self-starter with strong execution mindset and collaborative approach
  • Post-silicon debug experience strongly preferred


Contact

Sumit

Mulya Technologies

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