Senior Digital Testing Expert

1 week ago

thiruvananthapuram, India beBeeDigitalTest Full time

As a leading technical expert in digital testing, you will play a pivotal role in shaping the architecture and implementation of complex SoC/ASIC designs.You will be responsible for defining and driving DFT strategy and architecture for multiple projects, ensuring seamless integration with cross-functional teams.Key responsibilities include:Defining and implementing DFT features such as scan insertion and compression, ATPG pattern generation and fault grading, MBIST and Logic BIST insertion and validation, boundary scan (IEEE 1149.1/1149.6), and IJTAG (1687).Managing the end-to-end DFT flow from RTL to gate-level netlist and silicon bring-up.Collaborating with RTL, STA, PD, and test engineering teams for efficient integration.Performing pattern generation, fault simulation, and debug test coverage gaps.Ensuring DFT signoff, timing closure (DFT-related paths), and ATE pattern delivery.Supporting silicon bring-up, test vector validation on ATE, and yield optimization.Requirements:Bachelor's or Master's degree in Electronics, Electrical, or VLSI Design.At least 7 years of experience in DFT for complex ASIC or SoC designs.Expertise in scan insertion, compression, ATPG, MBIST, and boundary scan.Hands-on experience with DFT tools such as Synopsys, Siemens EDA, and Cadence.Strong knowledge of RTL design, STA, and synthesis flows.Proficient in scripting languages (Python, Perl, Tcl) for flow automation.

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