Senior Chip Design Optimization Specialist

4 days ago


Tirupati, India beBeeAutomation Full time

Job Title: Chip Design Optimization LeadWe are seeking an experienced Chip Design Optimization Lead to drive timing closure activities for complex System-on-Chip (SoC) designs. As a seasoned expert in full-chip Static Timing Analysis (STA), you will play a key role in ensuring the timely delivery of high-performance chips.Develop and manage functional and test constraints at block and top levels to optimize chip performancePerform STA for block-level and full-chip sign-off to ensure compliance with design specificationsOwn ECO generation at the top level and collaborate with block owners to implement timing/functional changes efficientlyWork closely with synthesis teams to ensure seamless integration of block-level and top-level synthesisDrive automation initiatives using Perl, Tcl, Awk, or Python to enhance design productivityMentor junior engineers on technical aspects of chip design optimizationThe ideal candidate should have 8+ years of hands-on experience in full-chip STA, proven expertise in constraints handling, STA sign-off, and ECO flow, strong scripting and automation skills, and excellent collaboration abilities.



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