Staff Engineer, Design Verification Engineering
3 weeks ago
About Analog Devices
Analog Devices, Inc. (NASDAQ:) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible. Learn more atand onand.
Staff Design Verification Engineer
The Industrial Converter Technology group develops leading edge Signal Chain solutions for Industrial and other applications. The group is seeking a Staff Verification Engineer who must have a proven track record of verifying complex mixed/digital signals ICs. The team handles verification of the products which include digital signal processing data-paths, sensors, high speed interfaces, and sub-systems. Candidate will work with the latest verification methodologies on designs ranging from individual blocks to sub-system level verification.
JobResponsibilities:
- Verification of sub-systems using leadingedge verification methodologies.
- Experience with development of verification plan and verification environment from scratch on multiple projects.
- Verification of blocks using System Verilog and UVM.
- Should have worked on scoreboard assertions, functional coverage, formal verification etc. to reach verification goals
- Take complete ownership for a complex feature verification and mentor & guide junior verification engineers.
- Define and implement improvements in verification flow and methodology.
- Gate level simulations and debug at sub-system level.
Job Requirements:
- Bachelor's or Masters degree in Electronics Engineering with 8+ years of experience in digital verification.
- Expertise in Verilog, System Verilog, UVM, object-oriented programming, scripting and automation with Perl or Python.
- Firm understanding of constrained random functional verification, coverage, and assertions.
- Expertise in test plan development and development of verification environments from ground up.
- Extensive experience with verification of complex blocks, regressions and coverage closure.
- Experience with gate level simulations and debug.
- Excellent debugging, analytical and problem-solving skills.
- Strong inter-personal, teamwork and communication skills.
- Expected to be highly independent, proactive and result-oriented to achieve verification goals.
Preferred qualifications:
- Knowledge of SPI, OTP/MTP, UART and I2S protocols..
- Experience in technically mentoring, coaching junior engineers.
Job Req Type: Experienced
Required Travel: Yes, 10% of the time
Shift Type: 1st Shift/Days
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