Design Verification Engineer

The Infra Silicon team at Meta is responsible for designing and building in-house hardware accelerator Application-Specific Integrated Circuits ASICs to enhance Meta s computing proficiency with superior capacity and efficiency at lower power and cost The team focuses on creating domain-specific System on Chips SoCs that enable Meta s data centers to execute computationally-intensive workloads such as video transcoding and AI ML with higher performance and lower energy consumption They are organized into several key areas including architecture algorithms design micro-architecture design verification implementation backend design emulation prototyping and system on chip SoC which collaborate extensively with other teams to deliver comprehensive solutions for various technical domains Design Verification Engineer Responsibilities Develop functional tests based on verification test plan Drive Design Verification to closure based on defined verification metrics on test plan functional and code coverage Debug root-cause and resolve functional failures in the design partnering with the design arch team Collaborate with cross-functional teams like Design Model Emulation and Silicon validation teams towards ensuring the highest design quality Minimum Qualifications Currently has or is in the process of obtaining a Bachelor s degree in Electronics Engineering Computer Engineering Computer Science Very Large Scale Integration VLSI relevant technical field or equivalent practical experience Degree must be completed prior to joining Meta Experience using constrained-random coverage driven verification or C C verification Experience in verifying a IP block using standard Design Verification DV based techniques Experience in Electronic Design Automation EDA tools and scripting Python Tool Command Language TCL Perl Shell used to build tools and flows for verification environments Understanding in at least one of the following areas computer architecture Central Processing Unit CPU Graphics Processing Unit GPU networking interconnects fabrics or similar designs Preferred Qualifications Currently has or is in the process of obtaining a Master s degree in Electronics Engineering Computer Engineering Computer Science or similar technical field Experience in development of SystemVerilog UVM based verification environments from scratch Experience debugging fails to the line of RTL closing out bug fixes using Verdi or equivalent debug tools Experience in verification of any peripheral IPs like UART SPI I2C and exposure to protocols like APB AXI Experience working in a CPU GPU environment Experience with revision control systems like Mercurial Hg Git or SVN About Meta Meta builds technologies that help people connect find communities and grow businesses When Facebook launched in 2004 it changed the way people connect Apps like Messenger Instagram and WhatsApp further empowered billions around the world Now Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology People who choose to build their careers by building with us at Meta help shape a future that will take us beyond what digital connection makes possible today-beyond the constraints of screens the limits of distance and even the rules of physics Equal Employment Opportunity Meta is proud to be an Equal Employment Opportunity employer We do not discriminate based upon race religion color national origin sex including pregnancy childbirth reproductive health decisions or related medical conditions sexual orientation gender identity gender expression age status as a protected veteran status as an individual with a disability genetic information political views or activity or other applicable legally protected characteristics You may view our Equal Employment Opportunity notice Meta is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans in 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