Lead Design Verification Engineer
4 days ago
Job Description Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions grounded in open standards. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs Intelligent Connectivity Platform integrates CXL, Ethernet, PCIe, and UALink semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. Discover more at www.asteralabs.com. Senior Design Verification Engineer We are seeking talented Design Verification Engineers with proven expertise in industry-standard protocols such as PCIe and CXL. You will play a key role in the functional verification of designs, from developing block-level and system-level verification plans to writing test sequences, executing tests, and collecting and closing coverage. Responsibilities - Develop and execute block-level and system-level verification plans. - Write and execute test sequences, and collect and close coverage. - Collaborate with RTL designers to debug failures and refine verification processes. - Utilize coding and protocol expertise to contribute to functional verification. - Develop user-controlled random constraints in transaction-based verification methodologies. - Write assertions, cover properties, and analyze coverage data. - Create VIP abstraction layers for sequences to simplify and scale verification deployments. Basic Qualifications - Minimum of 6 years experience in supporting or developing complex SoC/silicon products for server, storage, and/or networking applications. - Strong academic and technical background in Electrical Engineering or Computer Engineering (Bachelor's degree required, Master's preferred). - Professional attitude with the ability to prioritize tasks, prepare for customer meetings, and work independently with minimal guidance. - Knowledge of industry-standard simulators, revision control systems, and regression systems. - Entrepreneurial, open-minded behavior and a can-do attitude, with a focus on customer satisfaction. Required Experience - Interpreting PCIe/CXL standard protocol specifications to develop and execute verification plans in simulation environments. - Experience using Verification IPs from third-party vendors for PCIe/CXL, focusing on Gen3 or above. - Ability to independently develop test plans and sequences in UVM to generate stimuli. - Experience writing assertions, cover properties, and analyzing coverage data. - Developing VIP abstraction layers for sequences to simplify and scale verification deployments. Preferred Experience - Expertise in verifying Physical Layer, Link Layer, and Transaction Layer of PCIe/CXL protocols, including compliance on PCIe/CXL EP/RC. - Experience with buffering and queuing with QoS on complex NOC-based SoCs. - Analyzing performance at the system level on switching fabrics. Salary Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.
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Verification Lead Design Engineer
4 days ago
Bengaluru, Karnataka, India, Karnataka Cadence System Design and Analysis Full timeBE/BTech/ME/MTech - Electrical / Electronics / VLSI with an experience as a design and verification engineer.5+ years of Design Verification experience with SV/UVMStrong background on functional verification fundamentals, environment planning, test plan generation, environment development is a must.Design Verification experience verifying complex designs and...
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Design Verification Engineer
2 weeks ago
Bengaluru, Karnataka, India Eximietas Design Full time ₹ 20,00,000 - ₹ 25,00,000 per yearJob OverviewWe are seeking an experienced and highly skilled Senior SOC Design Verification Engineer with a minimum of 5 years of hands-on experience in SOC Design Verification. As a key member of our team, you will play a pivotal role in ensuring the robustness and correctness of our cutting-edge System on Chip designs.Job DescriptionLead and manage SOC...
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Verification Lead Design Engineer
3 weeks ago
Bengaluru, India Cadence System Design and Analysis Full time- BE/BTech/ME/MTech - Electrical / Electronics / VLSI with an experience as a design and verification engineer. - 5+ years of Design Verification experience with SV/UVM - Strong background on functional verification fundamentals, environment planning, test plan generation, environment development is a must. - Design Verification experience verifying complex...
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Verification Lead Design Engineer
2 weeks ago
Bengaluru, India Cadence System Design and Analysis Full timeBE/BTech/ME/MTech - Electrical / Electronics / VLSI with an experience as a design and verification engineer.5+ years of Design Verification experience with SV/UVMStrong background on functional verification fundamentals, environment planning, test plan generation, environment development is a must.Design Verification experience verifying complex designs and...
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Verification Lead Design Engineer
2 weeks ago
Bengaluru, India Cadence System Design and Analysis Full time- BE/BTech/ME/MTech - Electrical / Electronics / VLSI with an experience as a design and verification engineer.- 5+ years of Design Verification experience with SV/UVM- Strong background on functional verification fundamentals, environment planning, test plan generation, environment development is a must.- Design Verification experience verifying complex...
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Verification lead design engineer
3 weeks ago
Bengaluru, India Cadence System Design And Analysis Full timeBE/BTech/ME/MTech - Electrical / Electronics / VLSI with an experience as a design and verification engineer.5+ years of Design Verification experience with SV/UVMStrong background on functional verification fundamentals, environment planning, test plan generation, environment development is a must.Design Verification experience verifying complex designs and...
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Senior Design verification Engineer
4 days ago
Bengaluru, India ARF Design Pvt Ltd Full timeJob Description Skills: SOC Verifcation, ASIC Verification, Design Verification, Universal Verification Methodology (UVM), Open Verification Methodology, System Verilog, Senior RTL Verification Lead / RTL Verification Engineer Are you an experienced RTL Verification professional looking for your next challenge Look no further! Qualifications - BE/ME/MTech/MS...
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Verification Lead Design Engineer
3 weeks ago
Bengaluru, India Cadence System Design and Analysis Full timeBE/BTech/ME/MTech - Electrical / Electronics / VLSI with an experience as a design and verification engineer. 5+ years of Design Verification experience with SV/UVM Strong background on functional verification fundamentals, environment planning, test plan generation, environment development is a must. Design Verification experience verifying complex designs...
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Verification Lead Design Engineer
3 weeks ago
Bengaluru, India Cadence System Design and Analysis Full timeBE/BTech/ME/MTech - Electrical / Electronics / VLSI with an experience as a design and verification engineer.5+ years of Design Verification experience with SV/UVMStrong background on functional verification fundamentals, environment planning, test plan generation, environment development is a must.Design Verification experience verifying complex designs and...
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Verification Lead Design Engineer
1 week ago
Bengaluru, India Cadence System Design and Analysis Full timeBE/BTech/ME/MTech - Electrical / Electronics / VLSI with an experience as a design and verification engineer. 5+ years of Design Verification experience with SV/UVM Strong background on functional verification fundamentals, environment planning, test plan generation, environment development is a must. Design Verification experience verifying complex designs...
