Rtl Design And Verification Lead, Silicon

b Minimum qualifications Bachelor s degree in Electrical Engineering Computer Engineering Computer Science or equivalent practical experience 18 years of experience with digital logic design principles RTL design concepts or verification methodologies and languages such as UVM and SystemVerilog Experience in leading design development or functional verification team in IP development for SoCs including Power Performance and Area characterizations and optimizations Preferred qualifications Master s degree in Electrical Engineering Computer Engineering Computer Science or equivalent practical experience 10 years of experience in people management Experience in leading Silicon solutions development in multimedia or security or other complex SoC integrated IPs Experience in managing architecture specification to define Micro-architecture and its RTL implementation and verification through constrained random testbenches knowledge of ASIC development lifecycle architectural specification vendor engagement packaging post-silicon validation and system integration About the job Our computational challenges are so big complex and unique we can t just purchase off-the-shelf hardware we ve got to make it ourselves Your team designs and builds the hardware software and networking technologies that power all of Google s services As a Hardware Engineer you design and build the systems that are the heart of the world s largest and most powerful computing infrastructure You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users Pulling on your technical and leadership expertise you lead research projects in multiple areas of expertise across data center facilities and manage a team of direct reports working on equipment installation troubleshooting and debugging Google s mission is to organize the world s information and make it universally accessible and useful Our Devices Services team combines the best of Google AI Software and Hardware to create radically helpful experiences for users We research design and develop new technologies and hardware to make our user s interaction with computing faster seamless and more powerful Whether finding new ways to capture and sense the world around us advancing form factors or improving interaction methods the Devices Services team is making people s lives better through technology Responsibilities Lead and manage a team of engineers working on multimedia security or AI accelerator design verification and integration into SoC Develop Core IP front-end designs emphasizing on microarchitecture and Register-Transfer Level RTL design for the next generation CPU Propose performance enhancing microarchitecture features and work with software architect and performance teams for trade-off studies Communicate the pros and cons of microarchitecture enhancements Deliver designs meeting Power Performance Area PPA goals with production quality Be familiar with modern techniques interpret the techniques into design constructs and languages in order to provide guidance to and participate in the performance evaluation effort Lead Verification team to ensure production of quality designs Work with physical design and power teams to meet frequency power and area goals Google is proud to be an equal opportunity workplace and is an affirmative action employer We are committed to equal employment opportunity regardless of race color ancestry religion sex national origin sexual orientation age citizenship marital status disability gender identity or Veteran status We also consider qualified applicants regardless of criminal histories consistent with legal requirements See also Google s EEO Policy and EEO is the Law If you have a disability or special need that requires accommodation please let us know by completing our Accommodations for Applicants form