Senior Design Verification Engineer

2 weeks ago


Hyderabad, Telangana, India BITSILICA Full time
Verification

- Test bench development and debug
- UVM/C based test case development and debug.
- Power aware test case development and debug
- External/Internal VIP based test development and debug.
- Mixed-signal block modelling and RNM based testing.
- Coverage analysis (code, functional, assertion)
- Verification plan reviews, Verification reviews
- Back-annotated netlist simulation execution and debug
- Debug failing cases & Coverage improvements.

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