
Senior/Staff DFT Engineer
4 weeks ago
Responsibilities may include a subset or all of the following:
· Consultation for test solutions during design planning/budgeting.
Scan stitching, core wrapping, test point insertion etc through design compiler and fusion compiler flows at Synopsys
· Test methodology design rules checking during RTL coding stages.
· Implementation of design for test (DFT) compression, automatic test generation (ATPG) for single stuck at (SSAF), Transition Delay Fault, Cell-aware faults, and other advanced fault models
· Architects and implements solutions for built-in self-test (Memory and Reason BIST) circuitry to test devices in the field.
· Participations in customer's design and flow reviews.
· Diagnostics study and debug.
· Provides methodologies for test automation flow integration with design planning, RTL analysis, logic synthesis, physical design, and sign-off verification tools (static timing, simulation, formal verification).
· Develops white papers on methodology and other documentation as may be required for projects.
· Provides technical support/expertise for customers operating Synopsys test automation tools in a wide variety of application scenarios.
Key Qualifications
· B.E or M.S. in EE,Microelectronics or related field
At least 5-12 years of relevant work experience in DFT
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