Staff Digital Design Engineer- FPGA

Job Description

Are you looking for a unique opportunity to be a part of something great Want to join a 17,000-member team that works on the technology that powers the world around us Looking for an atmosphere of trust, empowerment, respect, diversity, and communication How about an opportunity to own a piece of a multi-billion dollar (with a B) global organization We offer all that and more at Microchip Technology, Inc.

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Job Description

As a member of Microchips FPGA design engineering team, you will be responsible for the definition, design and integration of interfaces between the global buses and the different blocks in the FPGA such as fabric, I/Os, NOCs, memories, etc.

- Collaborate with cross-functional teams to establish requirements and specifications for interface logic between global buses and FPGA components such as fabric, I/Os, Network-on-Chip (NoC), and memory blocks.
- Develop efficient, high-performance digital designs for these interfaces, ensuring compatibility and seamless communication between the FPGA&aposs internal components.
- Translate design and timing requirements provided by the architects into Verilog code ,and implement and test the RTL code.
- Partner with architects and lead designers to identify and implement improvements to enhance the efficiency, speed, and reliability of the interfaces.
- Provide support for post-silicon integration, bring-up, and validation.
- Effectively present technical information to small engineering teams.
- Maintain regular communication with the architecture, design and verification team across multiple locations to resolve issues, update status and address technical challenges.
- Stay updated with the latest industry trends and technologies to continuously improve design processes.

Requirements/Qualifications

- Bachelors or Masters in Electrical Engineering or Computer Science, with 12+ years of experience including several product cycles of successful ASIC and SoC development.
- Expertise in areas such as AMBA bus protocols, CPU and memory architecture.
- Familiarity with chip bus controllers and flash controllers, PCI-e, DDRx is a plus.
- Proficiency in Verilog, System Verilog, and testbench generation and simulation.
- Hands-on experience in synthesis and PnR.
- Proven skills in scripting, managing simulation queues, and data capture with ability to present findings using Microsoft Office tools, including Excel.
- Capability to support layout, verification, timing characterization, and software model developers.
- Strong analytical, oral and written communication skills
- Able to create clean, readable presentations.
- Self-motivated and proactive team player.
- Ability to meet schedule requirements effectively.

Travel Time

No Travel

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