3 Days Left NOC/IP-Design Verification Lead Engineer

NoC Verification EngineerExperience : 7 to 14 YearsKey Responsibilities:Develop UVM-based verification environments for NoC/IP blocks such as FlexNoC, GNOC, or custom NoC fabrics.Define and implement test plans, coverage models, scoreboards, monitors, and checkers for coherent and non-coherent traffic.Integrate and verify IPs like AXI4, CHI-B/C/E, PCIe, and...

NoC Verification EngineerExperience: 7 to 14 YearsKey Responsibilities:Develop UVM-based verification environments for NoC/IP blocks such as FlexNoC, GNOC, or custom NoC fabrics.Define and implement test plans, coverage models, scoreboards, monitors, and checkers for coherent and non-coherent traffic.Integrate and verify IPs like AXI4, CHI-B/C/E, PCIe, and...

NoC Verification Engineer Experience: 7 to 14 Years Key Responsibilities: Develop UVM-based verification environments for NoC/IP blocks such as FlexNoC, GNOC, or custom NoC fabrics. Define and implement test plans, coverage models, scoreboards, monitors, and checkers for coherent and non-coherent traffic. Integrate and verify IPs like AXI4, CHI-B/C/E, PCIe,...

We're looking for a passionate and hands-on RISC-V CPU Cluster/SoC DV Engineer to architect, develop, and evolve world-class verification infrastructure for high-performance RISC-V CPU clusters. If building from scratch, innovating on methodology, and collaborating with top-tier CPU designers excites you — read on.This role is hybrid, based out of...

Job Title:IP Verification Engineer – UVM verificationExp Level:4+ yrsLocation:Bangalore/HyderabadJob Description:System Verilog based UVM Functional verification, Behavioral modelling of functional blocks. System level performance verification, traffic patterns, bandwidth & latency analysis. Expertise in AXI4 bus protocol. Experience in Network On Chip...

Job Title :IP Verification Engineer – UVM verificationExp Level:4+ yrsLocation:Bangalore/HyderabadJob Description:System Verilog based UVM Functional verification, Behavioral modelling of functional blocks. System level performance verification, traffic patterns, bandwidth & latency analysis. Expertise in AXI4 bus protocol. Experience in Network On Chip...

Job Title: IP Verification Engineer – UVM verificationExp Level:4+ yrsLocation: Bangalore/HyderabadJob Description: System Verilog based UVM Functional verification, Behavioral modelling of functional blocks. System level performance verification, traffic patterns, bandwidth & latency analysis. Expertise in AXI4 bus protocol. Experience in Network On Chip...

Job Title :IP Verification Engineer – UVM verification Exp Level:4+ yrs Location:Bangalore/Hyderabad Job Description:System Verilog based UVM Functional verification, Behavioral modelling of functional blocks. System level performance verification, traffic patterns, bandwidth & latency analysis. Expertise in AXI4 bus protocol. Experience in Network On Chip...

BE/BTech/ME/MTech - Electrical / Electronics / VLSI with an experience as a design and verification engineer.5+ years of Design Verification experience with SV/UVMStrong background on functional verification fundamentals, environment planning, test plan generation, environment development is a must.Design Verification experience verifying complex designs and...

- BE/BTech/ME/MTech - Electrical / Electronics / VLSI with an experience as a design and verification engineer.- 5+ years of Design Verification experience with SV/UVM- Strong background on functional verification fundamentals, environment planning, test plan generation, environment development is a must.- Design Verification experience verifying complex...