Standard Cell Design Engineer

Title Standard Cell Design Engineer About GLOBALFOUNDRIES GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design development and fabrication services to some of the world s most inspired technology companies With a global manufacturing footprint spanning three continents GLOBALFOUNDRIES makes possible the technologies and systems that transform industries and give customers the power to shape their markets For more information visit Introduction In this position you will be integrated in our Foundry IP Development team in Bangalore In close collaboration with other disciplines across our worldwide engineering teams you will be developing layout for Std cell IP which enables our customers to perform product designs at highest quality standards based on GlobalFoundries advanced process nodes Job Responsibilities Development of product grade Standard Cell IP covering Circuit Design Characterization View generation and Validation phases Design and optimization of Combinational and Sequential Cells for various topology options Design and optimization of Power Management Kit cells like Level Shifter Power Gating Isolation and Always-on Cells Perform PPA trade-off analysis across different cell topologies architectures Circuit design of custom cells to meet specific low power or high-speed design requirements Collaborate with the layout engineers on schematic layout design and circuit topology exploration Perform Characterization view generation and validation of standard cell libraries across multiple PVT corners Implement innovative solutions in the Standard Cell domain which are in line with GlobalFoundries s business needs Being a good team player taking key initiatives for productivity improvements and innovation Sign off and release into dedicated IP validation test chips Required Qualifications Education MS M-Tech in Electrical Electronics Engineering with 10 years of relevant Experience PhD Electronics Electrical VLSI etc with 6 years of relevant Experience Relevant hands-on experience in standard cell circuit design and characterization Should have worked on Standard cells libraries for various process nodes especially deep Submicron FinFET and SOI Exposure to chip-level scenarios is a plus Proficient in handling EDA tools from Synopsys Mentor and Cadence used for parasitic extraction schematic entry simulation characterization etc Good knowledge of device physics Basic understanding of Standard Cell Layout Design and Layout Architecture Basic understanding of fabrication steps and flow Preferred Qualifications Programming experience applicable to design flow automation tasks Industry standard flow methodology development experience is a plus Experience in Testchip integration and analysis will be an added advantage You are flexible highly motivated and have a team-oriented working style You have shown the ability to communicate as well as work efficiently in an international multi-disciplinary environment Strong written and verbal communication skills in English are a must GlobalFoundries is an equal opportunity employer cultivating a diverse and inclusive workforce We believe having a multicultural workplace enhances productivity efficiency and innovation whilst our employees feel truly respected valued and heard As an affirmative employer all qualified applicants are considered for employment regardless of age ethnicity marital status citizenship race religion political affiliation gender sexual orientation and medical and or physical abilities All offers of employment with GlobalFoundries are conditioned upon the successful completion of background checks medical screenings as applicable and subject to the respective local laws and regulations Information about our benefits you can find here