Principal Emulation Verification Engineer

Invent the future with us.

Ampere is a semiconductor design company for a new era, leading the future of computing with an innovative approach to CPU design focused on high-performance, energy efficient, sustainable cloud computing.

By providing a new level of predictable performance, efficiency, and sustainability Ampere is working with leading cloud suppliers and a growing partner ecosystem to deliver cloud instances, servers and embedded/edge products that can handle the compute demands of today and tomorrow.

Join us at Ampere and work alongside a passionate and growing team — we'd love to have you apply. Come invent the future with us.

About the role:

As a part of the Emulation Team at Ampere, you will be part of verification of the next generation of microprocessor cores on hardware emulation platform by developing and deploying new capabilities and test content to accelerate bug finding in pre-silicon.

In this role, you will be at the forefront of AI innovation, building AmpereOne Aurora, our groundbreaking AI compute solution. Aurora combines high-performance general-purpose CPUs with integrated AI capabilities, offering a compelling combination of efficiency and market reach. This revolutionary product is poised to deliver superior performance while consuming significantly less power.

Design Verification is an integral part of the chip design process that ensures our customers get the absolute highest quality products that meets their functional and performance requirements. The Emulation Team at Ampere Computing comprises of stellar folks who have dedicated themselves to the art and fun of design verification. We are a tight knit, fast-paced team who work extremely closely with our design and architecture partners to ensure no bug is left behind.

What you'll achieve:

Your responsibilities may include, but are not limited to, the following:

- Be part of the emulation verification execution team and be responsible for planning, development, and execution of test content in varied domains including system stress, cache coherency and concurrency.
- Work in collaboration with design and architecture teams to root-cause failures using advanced debugging techniques.
- Develop high quality emulation test plans comprising of BareMetal content and OS based content for flushing even the most corner-case bugs.
- Create emulation models from RTL to run test content, using industry standard emulation platform technology.
- Develop or integrate high performance transactors and emulation test bench in System Verilog, SystemC/C++ and Python
- Review architecture and microarchitecture specs and influence design/microarchitecture decisions
- Be a mentor to some of the junior members of the team and help to grow them technically.
- Partner with emulation vendor to debug and quickly resolve blocking issues in the emulation technology as required

About you:

- M.Tech in Electronics Engineering or Computer Engineering with 6+ years of semiconductor experience or B.Tech in Electronics Engineering or Computer Engineering with 8+ years of semiconductor experience
- Knowledge about Cache coherency models, memory consistency models in AArch64 and/or x86.
- Knowledge about coherent interconnect protocols such as AMBA CHI, AXI4, ACE, etc. Knowledge of PCIE, DDR technology is a plus.
- Experience developing bare-metal content using C/C++ and assembly language for verification. ARM assembly expertise preferred.
- Experience with performance verification of coherent fabrics and cores is a plus.
- Experience debugging failures using innovative debug practices and familiarity with tools such as Verdi to debug RTL issues.
- Working experience with emulation technology of Zebu, Palladium or Mentor Veloce is strongly recommended.
- Self-motivated engineer with passion for innovation and demonstrated out-of-box thinking is strongly required.

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