Urgent Search: ASIC SOC RTL Design

Hi All,

Eximietas: Eximietas Design is a leading technology consulting and solutions development firm specializing in the VLSI, Cloud Computing, Cyber Security, and AI/ML domains.

Hiring: Senior ASIC SOC RTL Design Engineers.

❖ Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics

❖ Engineering 5+ years of ASIC SOC RTL (Micro-architecture) experience.

❖ Strong understanding of design concepts.

❖ ASIC flow Understanding of SDC Understanding STA reports

❖ Understanding of CDC logic Knowledge of lint rules and exceptions

❖ Design and use of block level simulations to bring up IP.

❖ Knowledge of AMBA buses and when to use them.

❖ Knowledge on common processor architectures (ARM, RiscV)

❖ FPGA experience includes part selection, pin assignment, timing constraints, synthesis, and debug of design in the FPGA.

❖ Relevant tool experience such as: Socrates, Core Consultant in addition to standard simulation tools (xcellium, vcs, etc) JTAG debugging experience (Coresight, Lauterbach, etc).

❖ Low power design techniques / UPF As an RTL Engineer, Candidate will be responsible to work at IP, Subsystem, or SoC-related tasks.

Responsibilities:

❖ Collaborate with architects, pre- and post-silicon verification teams to meet deadlines.

❖ Coordinate with customer leads, ensuring all deliverables and timelines are met.

Location: Visakhapatnam / Bangalore.

Interested Engineers, please share your updated resume: maruthiprasad.e@eximietas.design

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