Senior Engineer Verification
1 week ago
Job Description Responsible for developing and maintaining testbenches, debugging and optimizing Verification IP, and applying advanced verification methodologies such as UVM with System Verilog. Perform functional verification of IP modules in VHDL or Verilog and continuously enhance verification strategies to improve coverage, efficiency, and reliability Your Role Key responsibilities in your new role - Assist in the development of testbenches - Debug and optimize verification IP - Apply methods like UVM with System Verilog - Perform verification of IP modules (VHDL or Verilog) - Enhance the pool of our verification methods Your Profile Qualifications And Skills To Help You Succeed - B.E./B.Tech/M.E./M.Tech in Electrical /Electronics/ Computer science - Bachelor's - 2 to 4 years experience, Master's - 1 to 2 years experience - Looking for the candidates who - Have very good knowledge of an HDL such as VHDL or Verilog - Have good programming skills, e.g. in C, Python or Perl, as well as good Linux skills - System Verilog knowledge is a plus #WeAreIn for driving decarbonization and digitalization. As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener. Are you in We are on a journey to create the best Infineon for everyone. This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to give all applicants and employees equal opportunities. We base our recruiting decisions on the applicants experience and skills. Learn more about our various contact channels. Please let your recruiter know if they need to pay special attention to something in order to enable your participation in the interview process. Click here for more information about Diversity & Inclusion at Infineon.
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Senior Design Verification Engineer
1 day ago
Hyderabad, India ACL Digital Full timeJob Description Senior Design Verification Engineer Experience : 5-10 years Location : Hyderabad Functional Verification Engineer Role Summary: We are seeking an experienced Functional Verification Engineer with strong expertise in SystemVerilog/UVM to develop and maintain verification environments for block-level and IP-level designs. The ideal candidate...
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Senior Design Verification Engineer
2 days ago
India AMETEK Full time ₹ 15,00,000 - ₹ 42,00,000 per yearWe are currently seeking an experienced Senior Design Verification Engineer for our imaging and analytical products who will be responsible for verification of designs and developing verification environments for high performance embedded systems. This individual will be working closely with the Software and Hardware groups in United States. Some common...
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Design Verification Engineer
1 week ago
greater bengaluru area, india Tessolve Full time### Job Description: ASIC Design Verification Engineer**Location:** - Bangalore, Chennai, Hyderabad, Noida,Malaysia, Germany.**Experience Range:** 5 to 20+ years**Key Responsibilities:**- Develop and execute test plans to verify complex ASIC designs.- Utilize System Verilog (SV) and UVM methodologies for verification tasks.- Perform functional, formal, GLS...
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Design Verification Engineer
1 week ago
greater bengaluru area, india Tessolve Full time### Job Description: ASIC Design Verification Engineer**Location:** - Bangalore, Chennai, Hyderabad, Noida,Malaysia, Germany.**Experience Range:** 5 to 20+ years**Key Responsibilities:**- Develop and execute test plans to verify complex ASIC designs.- Utilize System Verilog (SV) and UVM methodologies for verification tasks.- Perform functional, formal, GLS...
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Design Verification Engineer
6 days ago
greater bengaluru area, india Tessolve Full time### Job Description: ASIC Design Verification Engineer **Location:** - Bangalore, Chennai, Hyderabad, Noida,Malaysia, Germany. **Experience Range:** 5 to 20+ years **Key Responsibilities:** - Develop and execute test plans to verify complex ASIC designs. - Utilize System Verilog (SV) and UVM methodologies for verification tasks. - Perform functional, formal,...
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ASIC Design Verification Engineer
2 weeks ago
Ahmedabad, India Tata Consultancy Services Full timeRole Overview:We are looking for Senior ASIC Design Verification Engineers with strong expertise in System Verilog (SV) and UVM methodology . The ideal candidate will have hands-on experience in SoC and IP-level verification across multiple domains, along with good scripting skills. Exposure to C language is a plus.Key Responsibilities:Develop and execute...
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ASIC Design Verification Engineer
1 week ago
Ahmedabad, India Tata Consultancy Services Full timeRole Overview:We are looking for Senior ASIC Design Verification Engineers with strong expertise in System Verilog (SV) and UVM methodology . The ideal candidate will have hands-on experience in SoC and IP-level verification across multiple domains, along with good scripting skills. Exposure to C language is a plus.Key Responsibilities:Develop and...
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Asic design verification engineer
1 week ago
Ahmedabad, India Tata Consultancy Services Full timeRole Overview:We are looking for Senior ASIC Design Verification Engineers with strong expertise in System Verilog (SV) and UVM methodology. The ideal candidate will have hands-on experience in So C and IP-level verification across multiple domains, along with good scripting skills. Exposure to C language is a plus.Key Responsibilities:Develop and execute...
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ASIC Design Verification Engineer
2 weeks ago
Ahmedabad, India Tata Consultancy Services Full timeRole Overview:We are looking for Senior ASIC Design Verification Engineers with strong expertise in System Verilog (SV) and UVM methodology. The ideal candidate will have hands-on experience in SoC and IP-level verification across multiple domains, along with good scripting skills. Exposure to C language is a plus.Key Responsibilities:Develop and execute...
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ASIC Design Verification Engineer
2 weeks ago
Ahmedabad, India Tata Consultancy Services Full timeRole Overview:We are looking for Senior ASIC Design Verification Engineers with strong expertise in System Verilog (SV) and UVM methodology. The ideal candidate will have hands-on experience in SoC and IP-level verification across multiple domains, along with good scripting skills. Exposure to C language is a plus.Key Responsibilities:Develop and execute...
