
Only 24h Left Senior Emulation/Prototyping Engineer
3 days ago
Experience : 4-5 years
Location : Bangalore
experience in emulation/prototyping using Cadence/Synopsys tool flows (Palladium/Protium/HAPS/Zebu)
2. Working knowledge of System Verilog & Verilog language semantics and compilation flows
3. Solid understanding on SOC architecture and AXI protocol
4. Good communication skills and team collaboration
Interested,please drop your updated resume to janagaradha.n@acldigital.com
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