
▷ Apply Now: Sr Principal RTL Design Engineer
2 days ago
College education in Electronics Engineering or Computer Engineering
Exp- 7-15 Yrs
- Working knowledge in RTL design flow steps like RTL coding, Simulation, compilation/testbench validation, Synthesis, Timing, DFT,lint, CDC, LEC etc.
- Ability to debug existing Verilog/System verilog test cases with little or no help from the designer.
- Functional simulation using Verilog/System Verilog.
- Good in Scripting languages(Shell, Perl, TCL, Python) and automation of design database qualification and packaging. Checks and validation of package consistency.
- Familiarity with Power Flow (UPF/CPF).
- Able to collaborate with IP-development teams and facilitate high-quality releases.
- Maintaining package and release timelines for various projects. Time management skills enough to balance multiple high-priority projects.
- Bug reporting and resolution closure with IP providers
- Ability to debug synthesis/timing analysis constraints, reports, logs
- Ability to learn new tools/flows and develop methodology if needed.
- Ability to build and maintain close relationships with Designers and Application Engineers.
- Fastidious approach to building automated processes.
- Strong interpersonal and relationship-building skills.
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Senior Principal RTL Design Engineer
2 weeks ago
Bengaluru, Karnataka, India beBeeDesign Full time ₹ 2,00,00,000 - ₹ 2,25,00,000Job Title: Senior Principal RTL Design EngineerAbout the RoleWe are seeking a highly skilled and experienced Senior Principal RTL Design Engineer to join our team. As a key member of our engineering organization, you will be responsible for leading the design and development of complex digital circuits.Key Responsibilities:Lead the design and development of...
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Sr RTL Principal Design Engineer
2 days ago
Bengaluru, India Cadence System Design and Analysis Full time- RTL Design Engineer for Interface Controller IP development team. - Position is based in Bangalore or Noida. - The role would include design and support of the RTL of the PCIe/CXL/IDE/UALink IP solution of Cadence. - The work involved will be working with the existing RTL, addition of new features into the RTL, ensuring various customer configurations are...
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Sr RTL Principal Design Engineer
7 days ago
Bengaluru, Karnataka, India Cadence System Design and Analysis Full timeRTL Design Engineer for Interface Controller IP development team. Position is based in Bangalore or Noida. The role would include design and support of the RTL of the PCIe/CXL/IDE/UALink IP solution of Cadence. The work involved will be working with the existing RTL, addition of new features into the RTL, ensuring various customer configurations are clean...
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Sr RTL Principal Design Engineer
1 week ago
Bengaluru, Karnataka, India Cadence System Design and Analysis Full timeRTL Design Engineer for Interface Controller IP development team. Position is based in Bangalore or Noida. The role would include design and support of the RTL of the PCIe/CXL/IDE/UALink IP solution of Cadence. The work involved will be working with the existing RTL, addition of new features into the RTL, ensuring various customer configurations...
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Sr RTL Principal Design Engineer
2 days ago
Bengaluru, India Cadence System Design and Analysis Full timeRTL Design Engineer for Interface Controller IP development team.Position is based in Bangalore or Noida.The role would include design and support of the RTL of the PCIe/CXL/IDE/UALink IP solution of Cadence.The work involved will be working with the existing RTL, addition of new features into the RTL, ensuring various customer configurations are clean as...
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Sr RTL Principal Design Engineer
3 days ago
Bengaluru, India Cadence System Design and Analysis Full timeRTL Design Engineer for Interface Controller IP development team.Position is based in Bangalore or Noida.The role would include design and support of the RTL of the PCIe/CXL/IDE/UALink IP solution of Cadence.The work involved will be working with the existing RTL, addition of new features into the RTL, ensuring various customer configurations are clean as...
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Sr Principal RTL Design Engineer
3 hours ago
Bengaluru, India Cadence Design Systems Full timeJob Description - 12+ years of experience in ASIC design - Proficient in Verilog coding, RTL design and complex control path and data path designs - Knowledge of any of the interface Protocols like UCIe, PCIe, USB, MIPI(DPHY), HDMI/Display, Ethernet, SATA - Knowledge of RTL checks ex- LINT, SDC, CDC Familiar with synthesis flow, LEC and timing constraints -...
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Sr Principal RTL Design Engineer
3 days ago
Bengaluru, India Cadence System Design and Analysis Full timeCollege education in Electronics Engineering or Computer EngineeringExp- 7-15 Yrs- Working knowledge in RTL design flow steps like RTL coding, Simulation, compilation/testbench validation, Synthesis, Timing, DFT,lint, CDC, LEC etc.- Ability to debug existing Verilog/System verilog test cases with little or no help from the designer.- Functional simulation...
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Sr Principal RTL Design Engineer
2 weeks ago
Bengaluru, Karnataka, India Cadence System Design and Analysis Full timeCollege education in Electronics Engineering or Computer EngineeringExp- 7-15 Yrs- Working knowledge in RTL design flow steps like RTL coding, Simulation, compilation/testbench validation, Synthesis, Timing, DFT,lint, CDC, LEC etc.- Ability to debug existing Verilog/System verilog test cases with little or no help from the designer.- Functional simulation...
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Sr Principal RTL Design Engineer
4 weeks ago
Bengaluru, Karnataka, India Cadence System Design and Analysis Full timeCollege education in Electronics Engineering or Computer Engineering Exp- 7-15 Yrs - Working knowledge in RTL design flow steps like RTL coding, Simulation, compilation/testbench validation, Synthesis, Timing, DFT,lint, CDC, LEC etc. - Ability to debug existing Verilog/System verilog test cases with little or no help from the designer. - Functional...