▷ 3 Days Left Staff, Design Verification
4 weeks ago
We're looking for a passionate and hands-on RISC-V CPU Cluster/SoC DV Engineer to architect, develop, and evolve world-class verification infrastructure for high-performance RISC-V CPU clusters. If building from scratch, innovating on methodology, and collaborating with top-tier CPU designers excites you — read on. This role is hybrid, based out of Bangalore. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting Who You Are - You thrive in building robust verification environments using SystemVerilog, UVM and C++, and can define and drive verification plans independently. - You bring a system-level mindset, with experience integrating multiple IPs into clusters or SoCs and verifying their interactions. - You have a strong grasp of stimulus planning, debug techniques, and coverage closure for verifying complex hardware subsystems like caches, NoCs, and memory hierarchies. - You’re comfortable working on features that span multiple IPs — such as coherence, security — and ensuring their correct behavior at the cluster or SoC level. What We Need - A Bachelor’s or Master’s degree in Electrical Engineering, Computer Science, or a related field. - 5- 12 years of Strong experience with System Verilog and UVM-based verification. - Proven ability to drive subsystem or SoC-level DV projects with integration and system feature validation responsibilities. - Familiarity with AXI/CHI protocols, System IPs flows (like debug/trace, power management), and integration flows for multi-IP verification environments. What You Will Learn - Techniques to scale DV infrastructure for verifying high-performance RISC-V clusters and SoCs. - How to verify multi-agent interactions across CPUs, system IPs and NoC or fabric components. - Best practices for cross-IP feature convergence, integration-level planning, and reuse across cluster/SOC programs. - How to collaborate with global teams across RTL, DV, software, and validation for cohesive system-level bring-up.
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Design Verification Engineer
2 weeks ago
Bengaluru, India ACL Digital Full time- Responsibilities - Collaborate with designers, architects, and verification teams to verify the design, architecture, and micro-architecture of ASICs. This includes developing the verification infrastructure, defining the verification scope, and using advanced verification methodologies.- Skills - Use computer hardware languages like Verilog, and have...
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Bengaluru, India ACL Digital Full timeTalented and motivated Mid-Level CPU Subsystem Design and Verification Engineer to join our growing team. Responsibilities: Design: Participate in the design of CPU subsystems, collaborating with architects and design engineers. Contribute to micro-architectural decisions, considering performance, power, and area trade-offs. Develop detailed design documents...
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Senior Design Verification Engineer
1 week ago
Bengaluru, India ACL Digital Full timeSenior Design Verification Engineer Location: Bangalore. Experience: 4 to 10 Years. Notice Period: Any. - Perform verification of complex digital designs at block and system level. - Develop testbenches using SystemVerilog/UVM for simulation and debugging. - Create and execute comprehensive test plans for functional verification. - Achieve coverage targets...
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▷ [3 Days Left] RTL Design Verification Engineer
4 weeks ago
Bengaluru, India ACL Digital Full timeSOC RTL Design Verification Experience: 4 to 10 Years Location: Bangalore Key Responsibilities: • Verification of SOC RTL (This is a DV Req) : FW-HW co-verification at SOC level, good understanding of SOC boot flow, integration level verification • Development and verification of post-si validation sequences using C/C++ • Create methodology-based (UVM)...
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Bengaluru, India ACL Digital Full timeDesign Verification:Experience : 4 yearsLocation : Hyderabad and Bagalore.Must have good knowledge on the verification flowsExcellent hands-on debug skills and problem solving attitude.Experience of working in complex test-bench/model in Verilog, System Verilog or SystemCExperience of working on Functional Verification, SoC Verification, EmulationGood in...
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Bengaluru, India ACL Digital Full timeHi All,ACL Digital is hiring Design Verification EngineersExperience: 8+ yearsLocation: Hyderabad / BangaloreJoin: ImmediateKey Skills:8+ Years in IP/Sub-System/SoC DV Testbench DevelopmentStrong in SV UVM, Functional & Formal VerificationHands-on with RISC-V / CPU / PCIe / DDR / EthernetSoC Integration, Debugging & Coverage ClosureExpertise in Assertions &...
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Staff Engineer, Digital Verification
1 week ago
Bengaluru, Karnataka, India Analog Devices Full time ₹ 15,00,000 - ₹ 25,00,000 per yearCompany DescriptionAnalog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that combines analog, digital, and software technologies to enable breakthroughs at the Intelligent Edge. With revenue of more than $9 billion in FY24 and approximately 24,000 employees globally, ADI ensures today's innovators stay ahead of what's possible.Role...
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Design Verification Engineer
6 days ago
Bengaluru, Karnataka, India Eximietas Design Full time ₹ 20,00,000 - ₹ 25,00,000 per yearJob OverviewWe are seeking an experienced and highly skilled Senior SOC Design Verification Engineer with a minimum of 5 years of hands-on experience in SOC Design Verification. As a key member of our team, you will play a pivotal role in ensuring the robustness and correctness of our cutting-edge System on Chip designs.Job DescriptionLead and manage SOC...
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Staff Design Verification Engineer
7 days ago
Bengaluru, Karnataka, India d-Matrix Full timeAtd-Matrix, we are focused on unleashing the potential of generative AI to power the transformation of technology. We are at the forefront of software and hardware innovation, pushing the boundaries of what is possible. Our culture is one ofrespect and collaboration.We value humility and believe in direct communication. Ourteam is inclusive, and our...
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Staff Design Verification Engineer
1 week ago
Bengaluru, Karnataka, India d-Matrix Full time ₹ 12,00,000 - ₹ 24,00,000 per yearAt d-Matrix, we are focused on unleashing the potential of generative AI to power the transformation of technology. We are at the forefront of software and hardware innovation, pushing the boundaries of what is possible. Our culture is one of respect and collaboration.We value humility and believe in direct communication. Our team is inclusive, and our...