Strategic / Leadership Role - Power (CPU)

Job Description

We are seeking a highly experienced and innovative Fellow to join our CPU Cores team. You will drive power innovations, strategies, methodologies, and estimation processes, setting industry standards.

Your deep understanding of CPU architecture and power management techniques will be crucial in leading cross-functional teams to achieve cutting-edge power efficiency in our products.

In this role, you will collaborate with RTL, verification, and engineering teams to integrate power-efficient solutions into our CPU cores.

Your leadership and strategic vision will guide the development of methodologies that optimize power usage.

Additionally, you will mentor team members and effectively communicate complex technical concepts to align stakeholders and drive successful implementation.

Key Responsibilities:

- Drive Power Innovations:Lead the development and implementation of innovative power management techniques and technologies to enhance the power efficiency of our CPU cores.
- Strategic Planning:Develop and execute power strategies that align with industry trends and company goals.
- Provide strategic direction for power-related projects and initiatives.
- Methodology Development:Create and refine methodologies for power estimation, analysis, and optimization.
- Ensure these methodologies are integrated into the design and development processes.
- End-to-End Power Management:Oversee the entire power management process from initial design to post-silicon validation.
- Ensure power efficiency is maintained throughout the product lifecycle.
- Cross-Functional Collaboration:Work closely with compiler teams, software teams, and other engineering groups to integrate power management techniques across all levels of the system.
- Cross-Functional Leadership:Collaborate with various teams, including design, verification, software, and product management, to ensure power efficiency goals are met.
- Provide technical guidance and mentorship to team members.
- Power Estimation and Analysis:Lead efforts in power estimation and analysis at different stages of the design cycle.
- Develop tools and models to predict and measure power consumption accurately.
- Post-Silicon Power Optimization:Lead efforts in post-silicon power analysis and optimization.
- Develop and implement strategies to address power issues identified during silicon validation.
- Innovation and Research:Foster a culture of innovation by encouraging research and experimentation in power management techniques.
- Identify opportunities for patents and publications.
- Industry Engagement:Stay abreast of the latest advancements in power management within the CPU industry.
- Represent the company in industry forums, conferences, and collaborations to influence and adopt best practices.
- Metrics:Define and track key performance indicators (KPIs) related to power efficiency.
- Report on progress and impact to senior leadership.

Qualifications:

- Education:Ph.D. or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
- Experience:Minimum of 20 years of experience in CPU architecture, power management, or related areas.
- Proven track record of driving power innovations and strategies in a leading semiconductor company.
- Technical Expertise:Deep understanding of CPU core design, power management techniques, and power estimation methodologies.
- Proficiency in relevant tools and technologies.
- Publications and Patents:Demonstrated history of publications in reputable journals and conferences.
- Experience with filing and securing patents related to power management and CPU design.
- Leadership Skills:Strong leadership and team management skills.
- Ability to lead cross-functional teams and drive complex projects to successful completion.
- Communication:Excellent verbal and written communication skills.
- Ability to articulate complex technical concepts to diverse audiences.
- Industry Knowledge:In-depth knowledge of industry trends, standards, and best practices in power management for CPUs.

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