Pe Analog Engineering

Overview Rambus a premier chip and silicon IP provider is seeking to hire an exceptional Principal Engineer - Analog Design to join our memory interface chip design team in Bangalore Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer As a Principal Engineer - Analog Design the candidate will be reporting to Director Engineering and is a Full-Time position The candidate will be leading the analog mixed signal circuit design activities for high-performance mixed signal chip products Rambus memory interface chips team delivers the most advanced chipset solutions for server memory sub-system This role gives opportunities to invent solutions to improve performance of next generation high-performance mixed signal products and learnings opportunities working through all the phases of chip product design all the way from concept to volume production Responsibilities As a Principal Engineer - Analog Design in memory interface chip design team you will Ownership of Analog Mixed designs at chip and or block level Define optimal architectures to achieve competitive product specifications Design simulate and characterize high-performance and high-speed circuits e g Transmitter Receiver LDO PLL DLL PI circuits Create high level models for design tradeoff analysis and behavior model for verification simulations Create floorplan and work with layout team to demonstrate post extraction performance Document analysis and simulation to show that design achieves critical electrical timing parameters and pre-silicon verification flow Mentor Manage junior team members and cultivate a growth mindset among team to encourage collaboration inclusion Participate and drive post silicon validation debug and customer collaboration Qualifications Master s with 8 years or PhD with 6 years of experience in CMOS analog mixed-signal circuit design Prior experience in some of the following circuits Transmitter Receiver with CTLE DFE PLL DLL PI LDO regulators Good knowledge of design principles for practical design tradeoffs Knowledge of high-speed chip to chip interfaces memory PHY SerDes is a strong plus Experience in modeling Verilog-A Verilog and scripting is desirable The position requires good written verbal communication skills as well a strong commitment and ability to work in cross functional and globally dispersed teams About Rambus With 30 years of innovation and semiconductor expertise Rambus leads the industry with products and solutions speed performance expand capacity and improve security for today s most demanding applications From data center and edge to artificial intelligence and automotive our interface and security IP and memory interface chips enable SoC and system designers to deliver their vision of the future Rambus offers a competitive compensation package including base salary bonus equity and employee benefits Rambus is proud to be an Equal Employment Opportunity and Affirmative Action employer We do not discriminate based upon race religion color national origin sex including pregnancy childbirth or related medical conditions sexual orientation gender identity gender expression age status as a protected veteran status as an individual with a disability genetic information or other applicable legally protected characteristics Rambus is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans in our job application procedures If you need assistance or an accommodation due to a disability you may let us know in the application Rambus does not accept unsolicited resumes from headhunters recruitment agencies or fee-based recruitment services For more information about Rambus visit rambus com For additional information on life at Rambus and our current openings check out