Physical Asset Verification

Company Description **Bosch Global Software Technologies Private Limited** is a 100% owned subsidiary of Robert Bosch GmbH, one of the world's leading global supplier of technology and services, offering end-to-end Engineering, IT and Business Solutions. With over 22,700 associates, it’s the largest software development center of Bosch, outside Germany,...

Physical Verification – 4 to 7 years @ Bangalore LocationWork with floorplan and physical design engineers to drive physical verification convergence.Should be proficient in DRC and LVS analysis at advanced nodes like TSMC5 or below.Good knowledge in specific areas like Antenna, ESD, ERC, LUP will be preferred.Working knowledge on full chip phyV will be...

Physical Verification – 4 to 7 years @ Bangalore Location Work with floorplan and physical design engineers to drive physical verification convergence. Should be proficient in DRC and LVS analysis at advanced nodes like TSMC5 or below. Good knowledge in specific areas like Antenna, ESD, ERC, LUP will be preferred. Working knowledge on full chip phyV...

Physical Verification – 4 to 7 years @ Bangalore LocationWork with floorplan and physical design engineers to drive physical verification convergence.Should be proficient in DRC and LVS analysis at advanced nodes like TSMC5 or below. Good knowledge in specific areas like Antenna, ESD, ERC, LUP will be preferred. Working knowledge on full chip phyV will be...

mplementation with emphasis on Physical Verification & Hard macro/core finishing activities. Must have led and been primarily responsible for physical verification checks , fixing and sign-off. Excellent understanding of Physical Verification flow with in-depth experience in analyzing and debugging DRC, ERC, LVS, DFM, Antenna, PERC, and Rule deck issues....

mplementation with emphasis on Physical Verification & Hard macro/core finishing activities.Must have led and been primarily responsible for physical verification checks , fixing and sign-off.Excellent understanding of Physical Verification flow with in-depth experience in analyzing and debugging DRC, ERC, LVS, DFM, Antenna, PERC, and Rule deck issues....

mplementation with emphasis on Physical Verification & Hard macro/core finishing activities.Must have led and been primarily responsible for physical verification checks , fixing and sign-off.Excellent understanding of Physical Verification flow with in-depth experience in analyzing and debugging DRC, ERC, LVS, DFM, Antenna, PERC, and Rule deck issues....

mplementation with emphasis on Physical Verification & Hard macro/core finishing activities.Must have led and been primarily responsible for physical verification checks , fixing and sign-off.Excellent understanding of Physical Verification flow with in-depth experience in analyzing and debugging DRC, ERC, LVS, DFM, Antenna, PERC, and Rule deck issues....

mplementation with emphasis on Physical Verification & Hard macro/core finishing activities. Must have led and been primarily responsible for physical verification checks , fixing and sign-off. Excellent understanding of Physical Verification flow with in-depth experience in analyzing and debugging DRC, ERC, LVS, DFM, Antenna, PERC, and Rule deck issues....

Role Overview: Lead and take charge of physical verification checks, fixing, and sign-off processes. Specialize in Physical Verification flow and have extensive experience in analyzing and resolving DRC, ERC, LVS, DFM, Antenna, PERC, and Rule deck issues primarily using Calibre tool. Thorough understanding of ESD, latch-up, and related areas. Execute PV...

Job Title: Physical Verification EngineerCompany: Join Our TeamJob Description:We are looking for a talented Physical Verification Engineer with extensive experience to become part of our team. The ideal candidate should possess deep knowledge in physical design implementation and validation at the block level, particularly focusing on 16/7nm technology...

**Experience**: 2+ Years **Location**: Bangalore Roles and responsibilities In a fast-paced leading-edge design environment with endless possibilities of innovation and learning, you will be responsible for ensuring flawless execution in specific areas of SoC level Physical Design such as Physical Verification, Tapeout, ESD Verification and Pre-emptive...

opportunity for Physical Verification Bangalore. Experience-8-20yrs Np-Immediate-30Days Location-Bangalore Skill - ASIC ,physical verification on chip side. **Job Types**: Full-time, Regular / Permanent, Fresher **Salary**: ₹100,000.00 - ₹2,000,000.00 per year Schedule: - Day shift - Monday to Friday Ability to commute/relocate: - Bangalore,...

Looking for Lead - Physical Verification Engineer Location: Bengaluru Experience: 10+yrs Availability: Immediate to 20 Days Skill Set Required: DRC, LVS DFM, Antenna, Density Fill Routines and other Tape-out sign-off experience is a must. Experience using Synopsys ICC Tool Tape-out experience of multiple complex chips at 14 nm or below is required. Good...

Job Description:Responsible for assembling of various design system into a full chip.Perform design rule checking (DRC) to identify and resolve System-on-chip layout violations and ensure compliance with manufacturing rules and constraints.Conduct layout versus schematic (LVS) verification to ensure the accuracy and consistency between full chip layout and...

Job Description:Responsible for assembling of various design system into a full chip.Perform design rule checking (DRC) to identify and resolve System-on-chip layout violations and ensure compliance with manufacturing rules and constraints.Conduct layout versus schematic (LVS) verification to ensure the accuracy and consistency between full chip layout and...

Job Description:Responsible for assembling of various design system into a full chip.Perform design rule checking (DRC) to identify and resolve System-on-chip layout violations and ensure compliance with manufacturing rules and constraints.Conduct layout versus schematic (LVS) verification to ensure the accuracy and consistency between full chip layout and...

Job Description:Responsible for assembling of various design system into a full chip.Perform design rule checking (DRC) to identify and resolve System-on-chip layout violations and ensure compliance with manufacturing rules and constraints.Conduct layout versus schematic (LVS) verification to ensure the accuracy and consistency between full chip layout and...

Job Description: Responsible for assembling of various design system into a full chip. Perform design rule checking (DRC) to identify and resolve System-on-chip layout violations and ensure compliance with manufacturing rules and constraints. Conduct layout versus schematic (LVS) verification to ensure the accuracy and consistency between full chip layout...

Job Description:Responsible for assembling of various design system into a full chip.Perform design rule checking (DRC) to identify and resolve System-on-chip layout violations and ensure compliance with manufacturing rules and constraints.Conduct layout versus schematic (LVS) verification to ensure the accuracy and consistency between full chip layout and...