Physical Design-7+ Years

Responsibilities : Develop and support automated physical design (PD) CAD flows, includingfloorplanning, placement, and routing optimization. Customize and optimize physical design flows using industry-standard EDA tools (suchas Synopsys ICC2, Cadence Innovus). Collaborate with the design and CAD teams to improve PD workflows, ensuring robustand...

Responsibilities : Develop and support automated physical design (PD) CAD flows, includingfloorplanning, placement, and routing optimization. Customize and optimize physical design flows using industry-standard EDA tools (suchas Synopsys ICC2, Cadence Innovus). Collaborate with the design and CAD teams to improve PD workflows, ensuring robustand...

Responsibilities: Develop and support automated physical design (PD) CAD flows, includingfloorplanning, placement, and routing optimization. Customize and optimize physical design flows using industry-standard EDA tools (suchas Synopsys ICC2, Cadence Innovus). Collaborate with the design and CAD teams to improve PD workflows, ensuring robustand...

Responsibilities: Develop and support automated physical design (PD) CAD flows, includingfloorplanning, placement, and routing optimization. Customize and optimize physical design flows using industry-standard EDA tools (suchas Synopsys ICC2, Cadence Innovus). Collaborate with the design and CAD teams to improve PD workflows, ensuring robustand...

Responsibilities :  Develop and support automated physical design (PD) CAD flows, including floorplanning, placement, and routing optimization.  Customize and optimize physical design flows using industry-standard EDA tools (such as Synopsys ICC2, Cadence Innovus).  Collaborate with the design and CAD teams to improve PD workflows, ensuring robust...

Overview: **WHAT YOU DO AT AMD CHANGES EVERYTHING** We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded....

PHYSICAL DESIGN: 3 TO 10 YEARS - 3+ years of experience in Physical Design for 14nm or less technology - Responsible for block level STA/timing closure / PNR. - Well versed with Synopsys Prime Time or Cadence Tempus or equivalent timing closure tool - Good communication skills English

Responsibilities: Minimum 8+ years of experience and with 0 - 30 Notice period Perform Synthesis, floorplanning, placement, Clock, routing, and PPA optimization for HighSpeed Advance ASICs. Define and drive physical design strategies to meet aggressive performance, power, and areatargets. Perform efficient Clock planning and distribution to...

PNR Lead Engineers Work Location: Bangalore Experience: 7+Years Technical Skills: Should be able to handle Full chip PnR (timing/congestion/CTS issues), understanding of IO ring, package support, multi voltage design Deep understanding of the concepts related to synthesis, place & route, CTS, timing convergence, IR/EM checks and signoff DRC/LVS closure...

Responsibilities:  Minimum 8+ years of experience and with 0 - 30 Notice period  Perform Synthesis, floorplanning, placement, Clock, routing, and PPA optimization for HighSpeed Advance ASICs.  Define and drive physical design strategies to meet aggressive performance, power, and areatargets.  Perform efficient Clock planning and distribution to...

Responsibilities:  Minimum 8+ years of experience and with 0 - 30 Notice period  Perform Synthesis, floorplanning, placement, Clock, routing, and PPA optimization for HighSpeed Advance ASICs.  Define and drive physical design strategies to meet aggressive performance, power, and areatargets.  Perform efficient Clock planning and distribution to...

Responsibilities :  Minimum 8+ years of experience and with 0 - 30 Notice period  Perform Synthesis, floorplanning, placement, Clock, routing, and PPA optimization for High Speed Advance ASICs.  Define and drive physical design strategies to meet aggressive performance, power, and area targets.  Perform efficient Clock planning and...

One of the ICSE Schools in Bangalore is hiring High School Physics Teacher.(Grade 7 to 10) - Experience: 3+years of relevant teaching experience - Qualification: M.Sc,B.Ed in Physics - Salary Range: 30K PM to 35K PM - Location: Jayanagar,Bangalore Immediate interviews and immediate joining Pay: ₹30,964.68 - ₹35,745.20 per month Schedule: - Morning...

Responsibilities : Minimum 8+ years of experience and with 0 - 30 Notice period Perform Synthesis, floorplanning, placement, Clock, routing, and PPA optimization for HighSpeed Advance ASICs. Define and drive physical design strategies to meet aggressive performance, power, and areatargets. Perform efficient Clock planning and distribution to...

We are seeking an experienced Senior Physical Design Engineer to join our team at Eximietas Design. This role will be responsible for designing and implementing high-speed advanced ASICs, driving physical design strategies to meet aggressive performance, power, and area targets.Responsibilities:

At Capgemini Engineering, the world leader in engineering services, we bring together a global team of engineers, scientists, and architects to help the world’s most innovative companies unleash their potential. From autonomous cars to life-saving robots, our digital and software technology experts think outside the box as they provide unique R&D and...

Role : Physical Design EngineerLocation : Hyderabad 5+yrs and Bangalore 7+Full time opportunityIntial round virtual and last face to face, Work from officeJob Description :- Proficient in Hierarchical and Block level Physical aware Synthesis while implementing logical and physical optimization, for timing closure along with deep functional knowledge in ASIC...

**Subsystem partitioning, timing budget generations, power planning, Integration of child blocks.** - **Block level implementation from netlist to GDSII.**: - **Handling timing closure of high frequency blocks.**: - **Expertise in signoff closure - Timing with SI and OCV, Power, IR and physical verification at both block and chip level.**: - **Handling...

Hi Greetings from Wipro, I’m #hiring #PD professionals. Know anyone who might be interested? Wipro has been providing semiconductor engineering services to the world’s leading companies for over 30 years. #Wipro currently works with 80 percent of the world’s top #semiconductors/Experience : Min 7 - 18 Years.Location : Bangalore / HyderabadIn-depth...

Hi Greetings from Wipro, I’m #hiring #PD professionals. Know anyone who might be interested? Wipro has been providing semiconductor engineering services to the world’s leading companies for over 30 years. #Wipro currently works with 80 percent of the world’s top #semiconductors/Experience : Min 7 - 18 Years.Location : Bangalore / HyderabadIn-depth...