RTL Design Engineer

Position: RTL Design EngineerExperience: 5 - 8 YearsQualifications: BE/Btech in ECE/EEEResponsibilities -The candidate should have strong RTL design experience.Strong design experience in Ethernet IPs or Ethernet protocol domain.Knowledge in Verilog/VHDL languagesScripting languages: TCL/Perl/Python (any one).Knowledge of AXI Protocols.

About the Role: Candidates should have strong experience in RTL design, with a focus on Ethernet IPs and protocols. Strong background in Verilog/VHDL languages is required. We are looking for individuals with scripting language proficiency in TCL/Perl/Python. Familiarity with AXI Protocols is essential. Location: Bangalore and Hyderabad Description: The...

System Requirements: The position of RTL Design Engineer requires a candidate with 5 to 8 years of experience. Key Responsibilities: The ideal candidate will have strong design experience in the Ethernet IP domain, including proficiency in Verilog/VHDL languages. In addition, they should possess knowledge of scripting languages such as TCL/Perl/Python and...

Experience range : 4+ Yrs and above only(no freshers please) Work Location : Hyderabad Notice : Immediate to 15 days Job Scope: RTL development from micro-architecture SoC, Memory, Peripheral, Security and Cache IP's Analysis & Integration RTL Quality checks (VCS, synthesis checks, LINT, LEC, CDC) Failures Debug/Bug fixes on RTL and Netlist Low level design...

Experience range : 4+ Yrs and above only(no freshers please)Work Location : HyderabadNotice : Immediate to 15 daysJob Scope:RTL development from micro-architectureSoC, Memory, Peripheral, Security and Cache IP's Analysis & IntegrationRTL Quality checks (VCS, synthesis checks, LINT, LEC, CDC)Failures Debug/Bug fixes on RTL and NetlistLow level design document...

Experience range : 4+ Yrs and above only(no freshers please)Work Location : HyderabadNotice : Immediate to 15 daysJob Scope:RTL development from micro-architectureSoC, Memory, Peripheral, Security and Cache IP's Analysis & IntegrationRTL Quality checks (VCS, synthesis checks, LINT, LEC, CDC)Failures Debug/Bug fixes on RTL and NetlistLow level design document...

Experience range : 4+ Yrs and above only(no freshers please)Work Location : HyderabadNotice : Immediate to 15 days Job Scope:RTL development from micro-architectureSoC, Memory, Peripheral, Security and Cache IP's Analysis & IntegrationRTL Quality checks (VCS, synthesis checks, LINT, LEC, CDC)Failures Debug/Bug fixes on RTL and NetlistLow level design...

Job DescriptionSkills:RTL Coding, RTL Design, ASIC, CDC, Linting, Verilog, EDA Tools, VHDL,Company OverviewProxelera&aposs unmatched expertise in VLSI design is expanding into new frontiers in the international market. Our business operations are making an entry into the Israeli market aggressively, heralding a new milestone. In this regard, we have signed...

Job Overview:We are seeking a highly skilled Principal Physical Design Engineer to lead our Physical Design team in low power design. As a key member of our team, you will be responsible for delivering complex chip designs from RTL to GDS. You will work closely with our engineers to investigate power inefficiencies and provide feedback to RTL...

Experience 3-10 years Role: IP/SOC design engineer working in the area of micro architecture, logic design, RTL coding, verification, supporting validation/software, silicon implementation support activities (ex: synthesis, timing, DFT,p&r) Job Requirements: 3+ years of hands-on experience with SoC design Worked on DDR/LPDDR/PCI...

We are looking for ASIC RTL Design Lead for Hyderabad location who can join us in an immediate basis with below skills & responsibilities: Total Years of Experience 10+Yrs Hands on RTL Design using verilog SoC and Subsystem integration, Pheripherals like PCIE, Ethernet and USB Integration Front end flow environment bringup Strong in the Flows, Lint, CDC,...

We are looking for ASIC RTL Design Lead for Hyderabad location who can join us in an immediate basis with below skills & responsibilities: Total Years of Experience 10+Yrs Hands on RTL Design using verilog SoC and Subsystem integration, Pheripherals like PCIE, Ethernet and USB Integration Front end flow environment bringup Strong in the Flows, Lint, CDC,...

About the Role : focuses on edge AI technology, committed to pushing the boundaries of what's possible in machine learning and artificial intelligence. We develop state-of-the-art AI processors, on-chip high speed interconnects that deliver unmatched performance, power efficiency, and scalability to meet the demands of modern AI applications. We also work on...

Job OverviewWe are seeking a highly skilled ASIC RTL Design Lead to join our team at Modernize Chip Solutions (MCS) in Hyderabad. This role requires an individual with extensive experience in RTL design, specifically with Verilog and SoC integration.

About the Role : focuses on edge AI technology, committed to pushing the boundaries of what's possible in machine learning and artificial intelligence. We develop state-of-the-art AI processors, on-chip high speed interconnects that deliver unmatched performance, power efficiency, and scalability to meet the demands of modern AI applications. We also work on...

About the Role : focuses on edge AI technology, committed to pushing the boundaries of what's possible in machine learning and artificial intelligence. We develop state-of-the-art AI processors, on-chip high speed interconnects that deliver unmatched performance, power efficiency, and scalability to meet the demands of modern AI applications. We also work on...

About UsModernize Chip Solutions is a cutting-edge technology company that specializes in designing and developing innovative ASIC solutions. We are committed to delivering high-quality products that meet the evolving needs of the market.Role OverviewThis is an exciting opportunity to join our team as an ASIC RTL Design Lead. As a leader in your field, you...

Job Title: Principal Physical Design EngineerLocation: Remote/Onsite OpportunityAbout the Role:We are seeking an experienced Principal Physical Design Engineer to lead our Physical Design team in low power design. The successful candidate will have expertise in low power physical design and be able to deliver complex chip designs from RTL to GDS.Key...

Job Title: Principal Physical Design EngineerLocation: Hyderabad or Bangalore, India (5 days onsite)Job Summary: We are seeking an experienced Principal Physical Design Engineer to lead our Physical Design team in low power design. The successful candidate will have expertise in low power physical design and be able to deliver complex chip designs from RTL...

Our MissionWe care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world.Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming, and embedded.Sr. Manager, NPU Silicon Design EngineeringThe...