Design Verification
4 weeks ago
is a Semiconductor Engineering services startup, head quartered in the heart of the Silicon Valley, San Jose, CA, USA.
Eteros Technologies India Pvt Ltd is a wholly owned subsidiary offices in Bangalore, Noida, Hyderabad and Ahmedabad
• Our world-wide customers are amongst The Who's who in the semiconductor industry.
Eteros works not only with some of the top 20 semiconductor startups in the world but boasts of customers who are among the most respected publicly traded semiconductor companies.
• Eteros engineers work on cutting edge technology nodes while working on the state-of-the art designs in the AI/ML, Datacenter, Automotive and 5 G domains.
Eteros engineers work with some of the brightest, innovative and successful engineers and leaders around the world.
A one-of-a-kind opportunity where young Eteros engineers showcase their ability and experience world-wide from day 1 while learning from some of the world's most well-respected companies.
• We are not your traditional design services company offering staff augmentation.
Eteros engineers are treated as an integral part of the customer team and routinely are responsible for turnkey, end-to-end ownership and delivery, whether it is Implementation, Digital and Mixed Signal Verification, DFT or Analog Design and Layout.
Eteros and our engineers work closely with our customers to define and set methodologies and design flows.
• Eteros invests in our engineers.
Our engineers are continuously learning, on and off the job.
They are able to grow the breadth and depth of knowledge.
We believe in preparing our employees for the fast-track in career development as well as longevity-----------------------------------------------------------------------------RISC-V processor verification4+ years of experience in verification and min.1-2 years' experience in RISC-V processor verification Computer architecture knowledge, Processor core design specifications, instruction set architecture and logic verification.
Understanding of caches' structure and parameters Experience in verification of coherent systems Proficiency in System Verilog and UVMDebug and trace ( memory /instruction )Exposure in developing test bench environment, write complex test scenario, debugging Experience in driving verification coverage closure.
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