Design Automation Lead

4 weeks ago


Bengaluru, India NXP Semiconductors Full time

Develop State-of-the art design methodology to enable Foundation IPs for SoC development. Develop and validate EDA Views for Standard-Cell and IO libraries in 28/16/5nm technology nodes. Interface with PDK, Foundation IP and other methodology teams to understand library/cell architecture, design flow requirements and device methods for EDA view generation and validation. Architect and develop/support validation checks and automation methods for productivity improvement. Explore and implement AI/ML methods for enhancing accuracy of models and Design throughput.


Required Skillset:

  • Experience in VLSI CAD Methodology development involving foundation IPs standard-cells, IO libraries.
  • Working knowledge with EDA views LEF, LIB, NDM, OA, Extraction, Timing and Power views.
  • Experience with library characterization flows, Working knowledge of EDA tools : Liberate or SiliconSmart, Solido, Crosscheck,
  • Knowhow of Physical design implementation, Timing and Power Analysis. Basic working knowledge of Innovus or ICC, Redhawk or Voluts, Tempus or PrimeTime.
  • Experience with Automation and Scripting using Python or Perl, Tcl or Shell.
  • Debugging and root cause analysis


Desirable skillset:

Experience with EDA Tool development and testing.

Knowhow of AIML methods would be highly desirable.


Academics : BE/B.Tech/ME/M.Tech in ECE or CS or EEE

Experience : 5-8 years



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