Mulya Technologies | SRAM Bitcell Design | bangalore
6 days ago
Opening is within Advanced Technology Development Department of the Technology and Manufacturing Group. Responsibilities include SRAM bitcell design, process integration, SWR/DOE (experiments) definition and generation, test structure definition, characterization, data analysis, design rule generation, process control document generation, device characterization, device simulation, driving SRAM yield and qualification.
Minimum Requirements:
Master of Science degree in Electrical Engineering, or related degree10+ years of relevant experienceKnowledge of semiconductor device physics and circuit designSolid understanding of CMOS and memory process flows and device integration, SRAM operation and reliability.Ability to simulate SRAM bitcells (process, electrical, and circuit levels) for transistor design, bitcell functionality and margin.Working knowledge of yield and data analysis.Good communication and documentation skills.
Additional Preferred Qualifications:
Knowledge of memory device physics, including non-volatile memory devices.Circuit design engineering background.Knowledge of Spectre simulation and Cadence design/layout tools.Knowledge and user of data analysis tools including JMP, Spotfire, Dataware, etc. as well as parsing code languages such as PERL, and Python.Ability to organize tasks and manage schedules while working simultaneously with multiple organizations and multiple management chains. Hands-on person willing to take ownership.Ability to drive for success and thrive in a fast-paced development environment with multiple shifting priorities.
Contact:UdayMulya "Mining The Knowledge Community"
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