Current jobs related to Verification lead - Bangalore - Tessolve
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Design verification lead
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Bangalore, India ACL Digital Full timeJob Title: Design Verification Lead Location: Bangalore/Hyderabad Experience: 7+yrs Job Type: Full-time Industry: Semiconductors / VLSI / EDA Education: B. E./B. Tech or M. E./M. Tech in ECE/EEE or related field Job Description: We are looking for a passionate and experienced Design Verification Lead to drive the verification...
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Design Verification Lead
2 weeks ago
bangalore, India ACL Digital Full timeJob Title: Design Verification LeadLocation: Bangalore/Hyderabad Experience: 7+yrs Job Type: Full-time Industry: Semiconductors / VLSI / EDA Education: B.E./B.Tech or M.E./M.Tech in ECE/EEE or related fieldJob Description:We are looking for a passionate and experienced Design Verification Lead to drive the verification of complex SoC/IP designs. The ideal...
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Design verification lead
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Bangalore, India L&T Technology Services Full timeL& T Technology services is looking to hire for Design Verification Engineers for Lead Role. Job Location : Bangalore Experience : 7-10 Years Job details are as below :: Job Description DV Positions: Define and implement IP/So C verification plans, build verification test benches to enable IP/sub-stem/So C level verification Develop functional tests...
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Design Verification Lead
2 weeks ago
bangalore district, India ACL Digital Full timeJob Title: Design Verification Lead Location: Bangalore/Hyderabad Experience: 7+yrs Job Type: Full-time Industry: Semiconductors / VLSI / EDA Education: B.E./B.Tech or M.E./M.Tech in ECE/EEE or related field Job Description: We are looking for a passionate and experienced Design Verification Lead to drive the verification of complex SoC/IP designs. The ideal...
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Design Verification Lead
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bangalore, India ACL Digital Full timeHi,Greetings from ACL Digital,Looking for Lead Design Verification EngineersExp Level:7+ YearsLocation : Bangalore and HyderabadJD:7+ Years of experience in Design verificationMust have Expertise:1. Grounds up verification environment development using SV/ UVM is a must2. One of the high speed protocols like PCIe or USB 3 or MIPI3. Experience in...
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Verification Lead Design Engineer
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bangalore, India Cadence System Design and Analysis Full timeBE/BTech/ME/MTech - Electrical / Electronics / VLSI with an experience as a design and verification engineer.5+ years of Design Verification experience with SV/UVMStrong background on functional verification fundamentals, environment planning, test plan generation, environment development is a must.Design Verification experience verifying complex designs and...
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Verification Lead Design Engineer
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bangalore, India Cadence System Design and Analysis Full timeBE/BTech/ME/MTech - Electrical / Electronics / VLSI with an experience as a design and verification engineer. 5+ years of Design Verification experience with SV/UVM Strong background on functional verification fundamentals, environment planning, test plan generation, environment development is a must. Design Verification experience verifying complex designs...
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SOC Design Verification Lead
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bangalore, India L&T Technology Services Full timeL&T Technologies is looking to hire for SOC DV Lead role. Job Location : Bangalore Job Title : SoC DV Lead YEARS OF EXPERIENCE : 8+ Years JOB DESCRIPTION: Expertise in verifying SOC based on ARM and RISC CPU’s. Define and implement ASIC / SoC verification plans, and build verification test benches to enable ASIC, sub-system, SoC level verification. Develop...
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Soc design verification lead
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Bangalore, India L&T Technology Services Full timeL& T Technologies is looking to hire for SOC DV Lead role. Job Location : Bangalore Job Title: So C DV Lead YEARS OF EXPERIENCE: 8+ Years JOB DESCRIPTION: Expertise in verifying SOC based on ARM and RISC CPU’s. Define and implement ASIC / So C verification plans, and build verification test benches to enable ASIC, sub-system, So C level verification....
Verification lead
4 weeks ago
ob Title: Senior Design Verification Engineer – IP/So C/Processor/GLS Experience: 5 to 15 Years Location: (Insert Location – e.g., Bangalore / Hyderabad / Chennai / Noida ) Company: Tessolve Semiconductor Job Type: Full-Time | Permanent Domain: Semiconductor – Design Verification Job Summary: Tessolve is hiring experienced Design Verification Engineers with a strong background in IP and So C-level verification , along with specialization in one or more of the following areas: processor/microarchitecture verification , high-speed interfaces (e.g., PCIe, USB, DDR) , or GLS (Gate-Level Simulation). This role involves ownership of verification strategy, planning, and execution in pre-silicon environments using industry-leading tools and methodologies. Key Responsibilities: Develop and execute detailed verification plans for IP blocks, subsystems, or So Cs. Design and build System Verilog/UVM-based testbenches , scoreboards, monitors, and drivers. Write and maintain directed and constrained-random test cases . Perform GLS (Gate-Level Simulation) with SDF back-annotation, reset validation, scan chain checking, and X-propagation analysis. Verify processor cores or custom pipelines, including cache/memory subsystems, MMUs, and coherency. Validate high-speed protocols (e.g., PCIe Gen4/Gen5, USB 3.x, DDR3/4/5, LPDDR, CXL). Debug RTL and testbench issues using waveforms, logs, and assertions. Collaborate with RTL, DFT, STA, firmware, and post-silicon teams to drive quality and coverage closure. Analyze functional/code/line/branch/coverage metrics and drive closure. Automate regressions and result analysis using scripting languages (Python, Perl, Shell, Tcl). Contribute to methodology improvements , tool evaluation, and reusable IP verification components. Required Skills & Qualifications: B. E./B. Tech or M. E./M. Tech in Electronics, Electrical, or Computer Engineering. 5–15 years of experience in ASIC/IP/So C/Processor Design Verification . Expertise in System Verilog , UVM , and constrained-random verification. Hands-on experience with simulation tools : VCS, Xcelium, Questa, Verdi, etc. Proven track record in any one or more of the following: Processor/Microarchitecture Verification (pipelines, instruction decode, coherency, etc.) High-speed Protocol Verification (PCIe, DDR, USB, Ethernet, CXL, etc.) GLS Verification (Zero-delay and SDF annotated simulations, scan chain checks, X-handling) Strong debugging skills and understanding of design specs and verification architecture. Proficient in scripting (Python, Perl, Shell, or Tcl) for test automation. Familiar with DFT/scan concepts , low power (UPF) , and assertion-based verification (SVA). Good to Have: Experience in ARM-based So Cs or RISC-V CPU verification . Exposure to formal verification , LEC , or static verification tools . Knowledge of post-silicon validation , FPGA prototyping , or emulation . Experience leading small teams or mentoring junior engineers.
