Sr. Principal Design

1 month ago


Bengaluru, India Enphase Full time
SoC Integration leadEnphase is looking for experienced SoC design engineers with SoC Logic Integration, Synthesis & STA closure experience to join our team in Bangalore India. The team is working on development of our next generation Control ASIC to production in 22nm technology. The ASIC will be a Mixed Signal SOC built around ARM microcontrollers.This position is in our ASIC Engineering Team Reporting to the Senior Director of ASIC Engineering in Bangalore India.ResponsibilitiesOwn full-chip RTL integration to Synthesized netlist generation. Act as liaison with our ASIC backend design services partner. You will be working with the Architecture & IP design teams for RTL Integration, timing constraints creation, synthesis. You will also validate the STA results on the final database delivered by our ASIC partner & DFT to entitlement.

RequirementsDeep understanding and experience in SoC architecture and integrationAbility to create the timing constraints based on specificationRTL Integration of SoC/Subsystems from IPs, ability to debug the issues in logic verification, act as liaison between Design and Place and Route teamsKnowledge of all the Soft IP collateral and deliverables eg: Lint, CDC, Synthesis, Timing constraints, LEC & ATPGExperience and ability to bring complex SOCs into the physical world and into production#SoC Integration #ARM #Synthesis #Timing Constraints #STA #DFTThis position is based in BangaloreCredentialsPrior hands on work experience of at least15 years in Logic IP/SoC design.



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