SoC (System-On-Chip) Architect
1 day ago
At Silicon Labs, we are a leader in secure, intelligent wireless technology for a more connected world. Our integrated hardware and software platform, intuitive development tools, unmatched ecosystem and robust support make us the ideal long-term partner in building advanced industrial, commercial, home and life applications. We make it easy for developers to solve complex wireless challenges throughout the product lifecycle and get to market quickly with innovative solutions that transform industries, grow economies, and improve lives.
Do you think creatively, design passionately and dream big? Then we want you on our team. Together we can build a smarter and more connected world.
Job Description
This position involves evaluating and designing complex Soc/Chip architecture that meet the PPA ( Power, Performance and Area) requirements as specified by the product marketing teams. These SoC devices are multi-core, multi-threaded processor subsystems with multi-level cache, capable of supporting multiple wireless protocols and application functionality, such as sensor hub, AI /ML and are specified to exceed best-in-class power and performance targets under some well-defined scenarios. This requires collaborating with software and system teams to identify and evaluate the feasibility of performance requirements.
Responsibilities
Architect and develop SOC architectures, memory hierarchy, digital and mixed-signal IPs needed to meet the best-in-class power and performance targets.
Coordinate with the product marketing teams to estimate achievable power and performance targets based on evaluation of existing SOC devices and the design constraints of the new family of SOCs in terms of software, technology node, availability of standard cell library and other foundational IPS such as RAMs and clock generators.
Collaborate with cross-functional teams, such as software, back-end implementation teams, analog designers of relevant IPs (clock generators), to design optimal SOC and IP architectures.
Project Execution
Contribute to SOC design schedule, including milestones and resource requirements. Coordinate with cross functional teams (such as software/validation/FPGA) on dependencies.
Support SOC infrastructure and IP designers in the evaluation of impact of design choices on PPA .
Continuously track power estimation through design phases until power sign-off before PG
Actively support the validation/application/software teams in evaluating key functionality in silicon and matching them to estimates.
Experience Level: 10+ years in Industry
Education Requirements: Bachelor or Master’s degree in Electrical or Computer Engineering
Qualifications:
Capable of leading complex IP development projects execution. Experience coordinating with contractors a plus.
Experience in full-chip development cycle
Hands-on experience in architecture, micro-architecture, digital design processes
Knowledge of high-speed interfaces like USB, PCIe, Ethernet, Mobile DDR, Quad/Octa-SPI
Knowledge of peripheral interfaces like SDIO, UART, I2S, I2C, PWM, CAN, etc.
Knowledge of processors like RISC-V and ARM processors
Knowledge of design signoff flows including Lint, CDC, Formal Verification, Synthesis, Constraints and STA Timing Closure
Knowledge of low power design methodology (static/dynamic clock gating, power gating, dynamic voltage and frequency scaling)
Knowledge of hardware accelerators
Knowledge of Verilog and System Verilog and modeling languages such as Matlab and SystemC
Knowledge of scripting languages like Perl, Python, Tcl, shell
Benefits & Perks
Not only will you be joining a highly skilled and tight-knit team where every engineer makes a significant impact on the product; we also strive for good work/life balance and to make our environment welcoming and fun.
Equity Rewards (RSUs)
Employee Stock Purchase Plan (ESPP)
Insurance plans with Outpatient cover
National Pension Scheme (NPS)
Flexible work policy
Childcare support
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