Backend Physical Design Engineer
4 weeks ago
Experience Required:
6 - 10 Years
Job Term:
Permanent
Location:
Bangalore
Category:
Semiconductor Design
A leading designer, developer and global supplier of a broad range of digital and analog semiconductor connectivity solutions that serve the wired infrastructure, wireless communications, enterprise storage and industrial markets.
Job Description:
Responsibilities include, but not limited to:
Deep understanding of SoC for top-down/bottom-up physical design integration in 7nm and lower technologies
Proficient in package co-design concepts • Drive Sub-block/partition decisions, floorplan for the best PPAS
Generate sub-block/partition interface budgets, review
Must have deep functional knowledge of P&R flows, should be able to catch up quickly on internal flows, adapt.
Implement timing and functional ECO
P&R, Extraction, Physical verification, work towards STA closure
Build automation flows wherever needed/adapt to existing flows for re-use
Must be proficient in any of the Cadence/Synospys/Mentor EDA tools for P&R, PV, STA, ECO
Needs to be automation savvy with high expertise in one of the programming languages used in the industry
Clearly know requisites for executing his/her job and lead by example
Bring tangible improvement in TAT with better quality
Minimum Qualifications:
MSEE/MSCS 6+ years (BSEE/BSCS 8+ years)
A deep understanding of backend digital design flow
Proficient in timing constraints, physical constraints
Proficient in handling EDA tools across floorplan/partition/placement/cts/route stages for SoC TOP.
Proficient with backend EDA tools viz, Genus/Innovus/Quantus/Tempus, DC/ICC2/Star-RCXT/PT, PrimeRail/Voltus, Redhawk
Proficiency in Tcl and Perl/Python
Excellent analytical skills
Shown ability to collaborate in a multi-functional environment, cross-site or cross-time zone
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