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Soc/Ip Verification Lead
2 months ago
- You will be responsible for driving verification strategy, writing Test Plan, developing/modifying Test Bench.
- Working on SoC DV signoff using C and/or SV-UVM.
- Reuse of IP DV UVM components like agent, driver, monitor and score board at SoC.
- Define and meet all structural and functional coverage goals
- SoC verification in RTL, GLS & AMS.
- Actively collaborate with IP/Architecture and RTL teams to enable meeting Verification goals for the SoCQualifications :
- 5+ Years’ experience working on SoC/IP DV with a Bachelor or Master’s degree in EE/ECE/CS or related specializationsSkills:
- Experience in one or many of the following : UVM/System Verilog/C/C++/scripting, Simulation, Formal verification, or post Silicon validation
- Thorough knowledge of standard protocols. Ex: AHB, APB, CAN, Ethernet, USB, I2C, SPI, UART etc
- Strong in digital design fundamentals, computer organization & architectures and bus protocols
- Excellent debugging and problem solving skill
- Experience with Cadence tools (IUS/Xcelium)
- Exposure to AMS and/or multicore SoC DV is a plus.
- Effective communication skills to interact with all stakeholders.
- Must be highly focused and remain committed to obtaining closure on project goals