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Principal Engineer Systems Design
6 days ago
JOB DESCRIPTION: Principal Engineer -TL, Communications Systems Design (Grade 13) Description - External This is a technical leadership role for Communications Systems and Algorithms development as per the need of Automotive SerDes Designs. Job will entail (1) developing understanding of the Standards such as ASA Motion Link, (2) developing an end to end simulation models (using MATLAB, SIMULINK, C/C++ to evaluate end to end PHY performance of a Serializer connected to a De-serializer over Coax, STP and UTP, possibly including one or more connectors, in presence of channel loss/attenuation/reflection, noise and other impairments including cross-talk, EMI etc. present inside a car, (3) developing bit accurate C-Models for various blocks for the Transmitter and the Receiver, (4) developing Communications Systems level specifications for the benefit of Analog Design (AFE Design), SoC architecture, DSP Firmware and Technical/Product Marketing teams, capturing those in documents to communicate what needs to be implemented (based on the requirements from the standards or even to go beyond standards for enhancements . if and when both the Serializer and De-serializer are from Onsemi) in the product by making presentations and even providing tutorials as appropriate. Candidate preferably should have hands on experience on most of the communications systems level building blocks of an end-to-end high data rate broadband wireline or wireless communications systems and/or high speed SerDes.
A PhD in Electrical Engineering along with 5+ years or a MS in Electrical Engineering with 10+ years of relevant industry experience in high speed wire-line communications PHY (. xDSL or or Cable Modems (DOCSIS) or Gigabit Ethernet (1000 BASE-T or N BASE-T or 10G BASE-T) or Automotive Ethernet (IEEE802.3bp or IEEE 802.3ch) or high speed wireless PHY (., BT, Wi-Fi, LTE or High Speed SerDes (56/112Gbps) design and associated DSP algorithms is preferred. Hands on experience with developing bit accurate C-Models for various Transmitter and Receiver blocks of a High-Speed Digital Communications System is highly desirable. Job requires interaction with the SoC Architecture, Analog Design (AFE design), DSP Firmware, Emulation and, Systems Test teams as well as with the cross functional teams like Technical Marketing, Product Marketing, FAE etc.
#LI-VS1
Position Requirements:
1. PhD in Electrical Engineering with 5+ years or MS in Electrical Engineering with 10+ years of relevant industry experience in high speed wire-line communications PHY (. xDSL or or Cable Modems (DOCSIS) or Gigabit Ethernet (1000 BASE-T or N BASE-T or 10G BASE-T) or Automotive Ethernet (IEEE802.3bp or IEEE 802.3ch) or high-speed wireless PHY (., BT, Wi-Fi, LTE or High Speed SerDes (56/112 Gbps) design and associated DSP algorithms is required.
2. Knowledge of Communications Systems Engineering, Signal Processing for Communications, DSP, Forward Error Correction (including encoders and decoders).
3. Ability to carry out complex High Speed broadband Digital Communications Systems design and associated DSP algorithms development.
4. Ability to develop bit accurate C-Models for various Transmitter and Receiver blocks of a High(1)Speed Digital Communications System
5. Can do attitude.
5. Strong communication skills
7. Ability to interact with cross functional teams and be a team player
8. Understanding of product development flow
#LI-VS1
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