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Analog & Mixed Signal Layout Design Engineer

3 months ago

bangalore, India Knowles Corporation Full time

Analog & Mixed Signal Layout Design Engineer Title: Layout Engineer - Analog Mixed Signal Status: Full-time Location: Knowles India Center COMPANY DESCRIPTION: Founded in 1946, Knowles Corporation (NYSE: KN) is a market leader and global supplier of advanced micro-acoustic solutions and specialty components serving the mobile communications, consumer electronics, medical technology, military, aerospace and industrial markets. Knowles has a leading position in micro-electro-mechanical systems microphones, speakers and receivers which are used in smartphones, tablets and mobile handsets. Knowles is also a leading manufacturer of transducers used in hearing aids and other medical devices. Knowles’s focus on the customer, combined with unique technology, rigorous testing and global scale, helps to deliver innovative solutions and consistently dependable and precise products. Headquartered in Itasca, Illinois, USA, Knowles has more than 8,000 employees in 25 locations around the world. For more information, visit JOB RESPONSIBILITIES: As a member of the AMS layout team, the candidate will deliver fully-verified, clean layouts, covering:

  • Hands-on design of complex layout blocks (ADCs, charge pumps, LDOs, IOs, amplifiers, etc.) in multiple CMOS technologies.
  • Layout execution and full-chip ASIC tape-out ownership.
  • Reviewing and analyzing floorplans and circuits with circuit designers.
  • Guiding 5-6 engineers.
  • Running a complete set of design verification tools on AMS blocks.
  • Interpreting LVS, DRC, and ERC reports to expedite layout completion, exceeding engineering specifications by collaborating closely with the circuit design team.
  • Using advanced CAD tools and mask design knowledge to provide accurate and robust layouts meeting strict matching performance, area, and power requirements.
  • Expertise in automation script development in Skill, Perl, Python, Unix Shell is advantageous.

REQUIRED QUALIFICATIONS:

  • Bachelor’s or Master’s Degree in Electronics and Communication Engineering.
  • 13-15 years of experience in AMS layout design.
  • Candidates with a minimum of two tape-outs of the full chip are preferred.
  • Good knowledge of electronic devices and semiconductor theory.
  • Knowledge of MENTOR GRAPHICS (Calibre) / CADENCE (Virtuoso, Assura) layout tools.
  • High-level proficiency in interpreting CALIBRE DRC, ERC, LVS, etc. reports.
  • High proficiency in custom and standard cell-based floor-planning and hierarchical layout assembly.
  • Experience implementing analog layouts for tight matching, low noise, and low power consumption.
  • Layouts may include analog blocks like ADCs, LDOs, charge pumps, amplifiers, pad IOs, ESD structures, etc.
  • Understanding techniques for managing IR drop, RC delay, electro migration, and coupling capacitance is essential.