Principal Physical Design Engineer

2 weeks ago

Bengaluru, India Micron Full time
Our vision is to transform how the world uses information to enrich life for all.Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.JR49377 Principal Physical Design EngineerResponsibilities

As an individual contributor, delivers full chip/complex subsystem RTL2GDS hands-on.Experience in Chip build/integration aspects - Floorplan, Partitioning, Pin placement, Budgeting, Power Plan, Bump plan & routing, Package co-design, Early analysis.Static timing analysis, multi-mode constraint analysis, Power, IR drop Analysis, Signal Integrity analysisTechnically lead junior team members and coordinate for full chip physical designCoordinate with Logic Design, Design For Test, Design Verification, Package design, Hardware teams

Requirements

A minimum of 13-18 years of exclusive physical design experienceIn-depth working knowledge to develop RTL2GDS flows independentlyHas done at least one multi-partition/multi-million gate System on Chip / Test chip as top level hands-on lead. OR,Delivered multi-Gigahertz, multi-million subsystem/subchip/partitions, as hands-on individual contributor for RTL2GDS.Leads by example, works on ambitious, results-oriented schedule & does data driven, flawless synchronized decision makingProficient in timing constraints, physical constraints, floorplanning, PG planning, Timing Modes & MarginsKnowledge of abstract timing/physical models, creation of.Excellent analytical skillsSpecialist in collaborating in a team of multi-functional, geographically distributed members with highly diverse skill levels.Bachelors of Engineering/Master of Technology in E&C/Electrical/Computer Science.

Preferred Skills:

Strong verbal communication skillsAnalog/MS/RF layout/design experienceRTL coding/verification experienceTest insertion experienceESD - Need, Implement, Check mechanism - exposure toPackage design, PCB design experiencePost-Silicon support experience

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