3 Days Left: Senior Design Verification Engineer
2 weeks ago
About the Role - As a member of this team you will lead the verification of the memory at SoC level using state of the art and industry standard tools for verification.
Required Skills:-
- 7+ years of work experience- Experience with technically leading (hands-on) pre silicon design verification.- Good knowledge on SV UVM methodology, and C base test env.- Experience with memory protocols like LPDDDR4, LPDDR4x, LPDDR5, LPDDR5x and HBM- Good knowledge on BUS protocols like AHB, AXI etc.- Good knowledge on SoC level debug.- Good SOC architecture fundamentals.- Experience with industry standard tools like Xcelium, Verdi.
Preferred Skills:-
- Experience on power aware runs and GLS at SoC level.- Experience with using emulators/ UVM acceleration.
Qualifications - B.E/B.Tech/M.E/M.Tech/PhD
If you're interested in exploring this opportunity further, please feel free to share your resume to
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