Senior CPU Architecture Verification Engineer

1 month ago


Bengaluru, India Mulya Technologies Full time
Senior CPU Architecture Verification EngineerLocation; Bangalore

Engineering, Bengaluru, India

Senior CPU Architecture Verification EngineerBangaloreEngineering /Full Time /On-Site

This position involves extensive hands-on experience with CPU verification using industry standard functional verification methodologies, formal verification and constrained random generators and reference model-based checkers. The candidate must be able to take critical decisions and completely own verification closure for a block or feature. This position involves cross functional interaction with CPU designers and architects and working across sites to ensure high quality CPU designs for customers.Minimum QualificationsBachelors/Masters in Electronics/Electrical/Computer Engineering with 7+ years of industry experience with a focus on functional verification in CPU verificationFamiliar with CPU architectures and superscalar designs and industry leading RISC processorsExposure to various ASIC design verification tools with good digital design conceptsKnowledge and experince with Interconnect protocols like AXI/ACE/OCP/CHIScripting experience in Python/Perl/TCL/ShellExperience in creating functional test plans and implementing them as part of pre-silicon verificationStrong knowledge of Verilog/SystemVerilog/C/C++/AssemblyStrong analytical and problem-solving skillsSelf-motivated with excellent communication and presentation skills, and ability to collaborate well locally and with global teamPreferred QualificationsExperience with RISC-V, ARM, and/or MIPS CPUExperience with multi core and coherency in modernFamiliarity with functional safety flows and requirementsRoles and ResponsibilitiesTake full ownership and drive verification efforts to closure for a blockWork closely with designers and architects to understand specifications at unit/top levelUnderstand use-cases and develop functional testplansDevelop directed tests written in C, Assembly and SystemVerilogDevelop random test generators to stress microarchitectural implementationsAnalyze coverage and fix holes in the testplanEnhance verification environment and testbench using latest methodologies, tools and automationSupport for prototyping in FPGA and/or EmulationHere’s what you can expect from us:, you’ll be a member of a fast-growing team of technologists that are creating the industry’s highest performance RISC-V processors. Small teams that are part of a non-compartmentalized structure – you’ll be able to understand and have an impact on the bigger picture. A great deal of autonomy, with support from some of the industry’s most experienced CPU engineers. An unlimited growth path – with the right skills, you can decide where you want to expand and grow in your role at . The opportunity to learn a great deal about the blossoming RISC-V architecture in cutting edge applications with industry leading customers.

we provide meaningful benefits programs and products to our associates and their families. We offer a competitive benefits package that includes medical, dental, vision, retirement savings, and paid leave

More about us:We are a well-known as a microprocessor pioneer, having led the way in RISC-based computing to enable faster and more power efficient semiconductors for a wide range of applications from consumer electronics to networking and communications. More than 30 years after the introduction of the original RISC architecture, our processors have shipped into billions of consumer and enterprise products.

Today, we are again leading a RISC revolution as we build on our deep roots to accelerate the RISC-V architecture for high-performance applications. We are focused on delivering our first RISC-V products: the eVocore processors, which provide a new level of scalability for high-performance heterogeneous computing. Because of our RISC heritage, deep engineering expertise, and proven technologies, we can accelerate development and deployment of RISC-V based solutions.

ContactUdayMulya "Mining The Knowledge Community"

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