RTL Design Lead

ASIC RTL Design Engineer/Lead Job Location : BLR, HYD, AHM, NOIDA, CHENNAI Work From Office (No Work from Home) Roles and Responsibilities : 4 - 9 years of ASIC RTL Design experience Experience in RTL design Verilog/VHDL Simulation tools, Modeslim/VCS etc. Basic protocols, I2 C, UART, PCIe, SPI etc. Micro-Architecture experience is a plus ...

We are currently seeking experienced RTL Engineers - Minimum 4 years of experience required - Proficiency in RTL development from micro-architecture - Expertise in SoC, Memory, Peripheral, Security, and Cache IP’s Analysis & Integration - Skilled in RTL Quality checks including VCS, synthesis checks, LINT, LEC, CDC - Strong background in Failures Debug/Bug...

We are currently seeking experienced RTL Engineers- Minimum 4 years of experience required- Proficiency in RTL development from micro-architecture- Expertise in SoC, Memory, Peripheral, Security, and Cache IP’s Analysis & Integration- Skilled in RTL Quality checks including VCS, synthesis checks, LINT, LEC, CDC- Strong background in Failures Debug/Bug...

RTL Design Engineers / Leads / Managers Experience: ~5 to 18+ Years Locations: India, Hyd, Delhi (NCR), Chennai, Bangalore, Kerala, Ahmedabad, Pune, Mumbai, Etc). Job Description: Expertise in SoC/IP design. Expertise in IP design, Subsystem/Cluster and SoC level integration using Verilog/System Verilog. In depth knowledge on RTL quality checks (Lint,...

ASIC RTL Design:General knowledge how things work in RTL team and be able to handle basic-to-mid level RTL tasks:RTL design/release flows/infra (LINT, CDC, UPF, IPXACT, CSR …)Good working knowledge in general scripting (Perl, Python, Make ...)Customer methodology/flow ask and complaints. Should be able to take up infra cleanup. Some good examples of infra...

ASIC RTL Design: General knowledge how things work in RTL team and be able to handle basic-to-mid level RTL tasks: RTL design/release flows/infra (LINT, CDC, UPF, IPXACT, CSR …) Good working knowledge in general scripting (Perl, Python, Make ...) Customer methodology/flow ask and complaints. Should be able to take up infra cleanup. Some good...

ASIC RTL Design: General knowledge how things work in RTL team and be able to handle basic-to-mid level RTL tasks: RTL design/release flows/infra (LINT, CDC, UPF, IPXACT, CSR …) Good working knowledge in general scripting (Perl, Python, Make ...) Customer methodology/flow ask and complaints. Should be able to take up infra cleanup. Some good examples of...

Sensesemi is looking for high-quality, driven semiconductor engineers, interested in working in start-ups, and building products from the ground up! We are developing a line of low-power AIoT SoC products to bring AI to the node at the edge. Our SoCs are highly integrated, ultra-portable, low-power IoT controllers, with AI inference on-die, RF connectivity,...

Senior Principal FPGA RTL Design Engineer Prodigy Technovations Pvt Ltd is a leading provider of advanced protocol validation solutions for testing and validating emerging and mainstream serial bus technologies in System-on-Chip (SoC) designs. With a focus on driving innovation and contributing to industry standards, Prodigy Technovations offers a...

Principal FPGA RTL Design EngineerProdigy Technovations Pvt Ltd is a leading provider of advanced protocol validation solutions for testing and validating emerging and mainstream serial bus technologies in System-on-Chip (SoC) designs. With a focus on driving innovation and contributing to industry standards, Prodigy Technovations offers a comprehensive...

Senior FPGA RTL Design Engineer Prodigy Technovations Pvt Ltd is a leading provider of advanced protocol validation solutions for testing and validating emerging and mainstream serial bus technologies in System-on-Chip (SoC) designs. With a focus on driving innovation and contributing to industry standards, Prodigy Technovations offers a comprehensive suite...

About the JobAre you looking for a career at one of the leading semiconductor companies in the world Texas Instruments (TI) is looking for a Digital Design Engineer to join the team of enthusiastic engineers who develops highly complex mixed signal devices for audio applications with industry leading performance.These audio products are truly mixed-signal...

We’re Hiring! Design Verification Engineer Are you passionate about ensuring top-notch quality in chip design? Join our team as a Design Verification Engineer and be a key player in validating cuttingedge semiconductor designs! Key Responsibilities: Develop and execute comprehensive test plans for verification of complex digital designs. ...

We’re Hiring! DesignVerification Engineer Are you passionate about ensuring top-notch quality in chip design? Join our team as a DesignVerification Engineer and be a key player in validating cuttingedge semiconductor designs! Key Responsibilities: Develop and execute comprehensive test plans for verification of complex digital designs. ...

We’re Hiring! DesignVerification Engineer Are you passionate about ensuring top-notch quality in chip design? Join our team as a DesignVerification Engineer and be a key player in validating cuttingedge semiconductor designs! Key Responsibilities: Develop and execute comprehensive test plans for verification of complex digital designs. Create and...

We’re Hiring! DesignVerification EngineerAre you passionate about ensuring top-notch quality in chip design? Join our team as a DesignVerification Engineer and be a key player in validating cuttingedge semiconductor designs!🔍 Key Responsibilities:Develop and execute comprehensive test plans for verification of complex digital designs.Create and maintain...

We are seeking an experienced Senior Design Verification Specialist to join our team at Eximietas Design in India. This is a full-time position.Estimated Annual Salary: ₹8,50,000 - ₹12,00,000About the Role:The successful candidate will be responsible for developing and executing comprehensive test plans for verification of complex digital designs,...

Responsibilities: Develop and support automated physical design (PD) CAD flows, includingfloorplanning, placement, and routing optimization. Customize and optimize physical design flows using industry-standard EDA tools (suchas Synopsys ICC2, Cadence Innovus). Collaborate with the design and CAD teams to improve PD workflows, ensuring robustand...

Role: Principal / Senior Staff SoC/Chiplet RTL Integration Design Engineer Location : Greater Hyderabad Area Responsibilities include: Collaborate with SoC/System architects and IP providers to define the RTL (Register Transfer Level) integration strategy for complex System-on-Chip (SoC)/Chiplet designs. Integrate IP blocks, including CPUs, GPUs,...

Role: Principal / Senior Staff SoC/Chiplet RTL Integration Design Engineer Location : Greater Hyderabad Area Responsibilities include: Collaborate with SoC/System architects and IP providers to define the RTL (Register Transfer Level) integration strategy for complex System-on-Chip (SoC)/Chiplet designs. Integrate IP blocks, including CPUs, GPUs,...