Senior physical design lead engineer

3 days ago

Bangalore, India ACL Digital Full time

Role Overview: Job Title : PNR Lead Experience : 8+ Years Work location : Bangalore Job Description: Technical Skills: Should be able to handle Full chip Pn R (timing/congestion/CTS issues), understanding of IO ring, package support, multi voltage design Deep understanding of the concepts related to synthesis, place & route, CTS, timing convergence, IR/EM checks and signoff DRC/LVS closure Responsible for independent planning and execution of all aspects of physical design including floor planning, place and route, Clock Tree Synthesis, Clock Distribution, extraction, Timing closure, Power and Signal Integrity Analysis, Physical Verification, DFM Must have participated in all stages of the design (floor planning, placement, CTS, routing, physical verification, IREM) Well versed with the timing closure (STA), timing closure methodologies Good Understanding of DRC, LVS, ERC and PERC rule files for lower tech node layout verification Experience in lower tech node (

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    Bangalore, India Eximietas Design Full time

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    3 days ago

    bangalore, India Eximietas Design Full time

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    Bangalore, India Eximietas Design Full time

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    7 days ago

    bangalore, India Eximietas Design Full time

    Hi All,Eximietas Hiring Senior Physical Design Leads/Managers (EMIR).Experience: 8+ Years.Location: Bengaluru.About the jobQualification Required: (EMIR).Block / Subsystem / Partition• Role: EM/IR.• EDA Tool: Redhawk & Node: TSMC 3nm / 5nm.• ESD resistance, PG Grid, Static/Dynamic power, SRP, BQM checks - Running/ Analysis/Fixes.• Tcl, Perl, Python...

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    3 days ago

    Bangalore, India ACL Digital Full time

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    bangalore, India ACL Digital Full time

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    bangalore, India HCLTech Full time

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    7 days ago

    bangalore, India HCLTech Full time

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