Standard Cell Layout Engineers

Location: Bangalore/HyderabadExperience: 2 to 5yrsAvailability - Immediate to 20 DaysPOC: Afreen Malik - Description:-> B.Tech/M.Tech-> Must have 3+ years of experience in standard cell layout, analog, mixed-signal and custom digital block designs in advanced CMOS process.-> Should have expertise in multiple standard cell layout library developments.->...

Location: Bangalore/HyderabadExperience: 2 to 5yrsAvailability - Immediate to 20 DaysPOC: Afreen Malik - Job Description:-> B.Tech/M.Tech-> Must have 3+ years of experience in standard cell layout, analog, mixed-signal and custom digital block designs in advanced CMOS process.-> Should have expertise in multiple standard cell layout library developments.->...

Job Title: Standard Cell CharacterizationExperience: 5+yrsLocation: BengaluruJob description:Standard Cell Library Validation, QA Checks, Packaging and Release.Perform QA checks and library validation for high volume standard cell designs.Lead a team of engineers with QA activities for all different design views generated.Deal with the cross functional...

Develops block, macro, or chip level layouts and floorplans according to project requirements, specifications, and design schematics. Applies understanding of design manuals, established processes, layout elements, and basic electronic principles to create accurate designs that meet project needs. Conducts analyses, tests, and verifies designs using...

We are looking for a Standard Cell / iO Cell Designer Product Engineer in Bangalore for the following role and with the given background/skill sets. Does this sound like a good role for you?.Senior Standard Cell/iO Cell Design Engineer(SPICE products)Location: BangaloreExperience: 6yrs to 15yrsMasters in EE/CS or a Bachelor in EE/CS with 6 years of relevant...

We are looking for a Standard Cell / iO Cell Designer Product Engineer in Bangalore for the following role and with the given background/skill sets. Does this sound like a good role for you?. Senior Standard Cell/iO Cell Design Engineer(SPICE products) Location: Bangalore Experience: 6yrs to 15yrs Masters in EE/CS or a Bachelor in EE/CS with 6 years of...

Location: BengaluruExperience: 3+yrsNotice Period: Immediate to 90 DaysKindly share updated profile to Description:Characterization and generation of front end and back end views for standard cell libraries Custom cell characterization setup and flowsLibrary verification and validationAutomation for the QA checks, for small tasks in setting up the flows...

Job Description In this position, you will lead and participate in the design, development, validation, and delivery of standard cell libraries using leading process technologies for use in the design of Intel's next-generation SoCs and microprocessors. Responsibilities include, but are not limited to:- Design and implementation of the...

Job Description In this position, you will lead and participate in the design, development, validation, and delivery of standard cell libraries using leading process technologies for use in the design of Intel's next-generation SoCs and microprocessors. Responsibilities include, but are not limited to:- Design and implementation of the...

Experience in Mixed-Signal layouts.Work Location: BangaloreExp: 3+YrsEducation: B.E./B.Tech. or Masters/M.Tech.Must have TSMC 3nm, 5nm, 7nm FINFET experience.Should have worked on Mixed-Signal layout blocks like: High-speed SerDes Transmitter(Tx), Receiver(Rx), PLL, USR, LNA etc.Analog-to-Digital Converters (ADCs) Successive Approximation (SAR) ADC,...

Location: BengaluruExperience: 3+yrsNotice Period: Immediate to 90 DaysKindly share updated profile to Job Description:Characterization and generation of front end and back end views for standard cell librariesCustom cell characterization setup and flowsLibrary verification and validationAutomation for the QA checks, for small tasks in setting up the flows...

Location: BengaluruExperience: 3+yrsNotice Period: Immediate to 90 DaysKindly share updated profile toJob Description:Characterization and generation of front end and back end views for standard cell librariesCustom cell characterization setup and flowsLibrary verification and validationAutomation for the QA checks, for small tasks in setting up the flows...

Location: BengaluruExperience: 3+yrsNotice Period: Immediate to 90 DaysKindly share updated profile to Job Description:Characterization and generation of front end and back end views for standard cell librariesCustom cell characterization setup and flowsLibrary verification and validationAutomation for the QA checks, for small tasks in setting up the flows...

Location: Bengaluru Experience: 3+yrs Notice Period: Immediate to 90 Days Kindly share updated profile to Job Description: Characterization and generation of front end and back end views for standard cell libraries Custom cell characterization setup and flows Library verification and validation Automation for the QA checks, for small tasks in setting up...

We are looking for a Standard Cell / iO Cell Designer - Product Engineer in Bangalore for the following role and with the given background/skill sets. Does this sound like a good role for you?.Senior Standard Cell/iO Cell Design Engineer(SPICE products)Location: BangaloreExperience: 6yrs to 15yrsMasters in EE/CS or a Bachelor in EE/CS with 6 years of...

We are looking for a Standard Cell / iO Cell Designer - Product Engineer in Bangalore for the following role and with the given background/skill sets. Does this sound like a good role for you?.Senior Standard Cell/iO Cell Design Engineer(SPICE products)Location: BangaloreExperience: 6yrs to 15yrsMasters in EE/CS or a Bachelor in EE/CS with 6 years of...

Experience in Mixed-Signal layouts.Work Location: BangaloreExp: 3+YrsEducation: B.E./B.Tech. or Masters/M.Tech.Must have TSMC 3nm, 5nm, 7nm FINFET experience.Should have worked on Mixed-Signal layout blocks like: High-speed SerDes - Transmitter(Tx), Receiver(Rx), PLL, USR, LNA etc.Analog-to-Digital Converters (ADCs) - Successive Approximation (SAR) ADC,...

Experience in Mixed-Signal layouts.Work Location: BangaloreExp: 3+YrsEducation: B.E./B.Tech. or Masters/M.Tech.Must have TSMC 3nm, 5nm, 7nm FINFET experience.Should have worked on Mixed-Signal layout blocks like: High-speed SerDes - Transmitter(Tx), Receiver(Rx), PLL, USR, LNA etc.Analog-to-Digital Converters (ADCs) - Successive Approximation (SAR) ADC,...

Job Location: BangaloreNotice Period: Immediate or 15 daysExp:3+ yearsResponsible for Memory Compiler layout development and verification.· Responsible for Layout design and development of Memory blocks such as Array, Row/ Column decoder, sense amplifier, pre-charge, Control blocks for SRAM.· Perform layout verification like LVS/ DRC/ Latchup, quality...

Job Location: BangaloreNotice Period: Immediate or 15 daysExp:3+ yearsResponsible for Memory Compiler layout development and verification.· Responsible for Layout design and development of Memory blocks such as Array, Row/ Column decoder, sense amplifier, pre-charge, Control blocks for SRAM.· Perform layout verification like LVS/ DRC/ Latchup, quality...