IP Lead

5 days ago

Bengaluru, India Tata Electronics (TEPL) Full time

Seeking for highly skilled Analog IP Design Lead to join the TATA Electronics Business Unit where in the candidate will get to work on a wide range of exciting products and foundry enablement. This job position shall be Tata Semiconductor Manufacturing (TSM) division, based in Dholera/Bangalore. The successful candidate will work with 100% quality and with efficiency with quick time to market mindset. This role requires working closely with the internal IP design, TD, PDK, Layout, test and product engineering teams. The roles and responsibilities will include the working with customer requirement, architecture, circuit design, simulations and verification and all the interface of the memory design like amplifier, multi read/write decoders etc.

Functional Requirements:

  • Requires MTech in Electrical (VLSI, Microelectronics) from a reputed university with 10-15 years of in field experience

  • Candidate with any of the below mentioned Analog IP design experiences can apply

  • Experienced in one or more aspects of Analog circuit design from block level to full chip with a demonstrated history in driving design innovation and best practices.

  • Must be proficient in transistor level design and system implementation of typical building blocks like charge pumps, comparators, amplifiers, bandgaps, linear regulators, switching regulators, TX, RX, Drivers, Interpolators etc.

  • Candidates with solid Analog circuit design concepts and have worked to design, develop and deliver on quality collaterals of IP may apply for this job Role.

  • Candidates with knowledge to design as many of the IPs like GPIO, PLL, LDO, Oscillators, DLL, X-tal Oscilators, DC-DC Buck, ADC/DAC may please apply.

  • Candidates with knowledge to Arch design and develop DC-DC- Buck/Boost, SerDes, DDR will have advantage.

What You will be doing:

  • Supervision of overall Analog IP development. Architecture development, decision making in circuit topology finalization, review of functional and performance of all Analog IPs.

  • Hands-on Capability and design of complex IP

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