Director of Verification/ RTL Design

Job Description: Roles & Responsibilities: Exp- 12 - 16 yrs The role requires the management of a SerDes DV group focusing on MDV verification including: Constrained Random Functional Verification, Formal Property Verification, project DV status and execution, and mentorship of junior engineers. The role requires the ability to work with the existing...

Company Description : InSemi Technology Services Pvt. Ltd. , founded in 2013, is a design services company specializing in VLSI and embedded systems. With expertise in chip design and embedded domains, we provide engineering design services and bridge the gap between academia and industry. Our VLSI expertise includes memory compiler/custom IP, analog and...

Job Description:Roles & Responsibilities:Exp- 12 - 16 yrsThe role requires the management of a SerDes DV group focusing on MDV verification including: Constrained Random Functional Verification, Formal Property Verification, project DV status and execution, and mentorship of junior engineers.The role requires the ability to work with the existing functional...

Job Description:Roles & Responsibilities:Exp- 12 - 16 yrs- The role requires the management of a SerDes DV group focusing on MDV verification including: Constrained Random Functional Verification, Formal Property Verification, project DV status and execution, and mentorship of junior engineers.- The role requires the ability to work with the existing...

Be part of the Cadence High-Speed SerDes PHY IP Front end Design team responsible for --Defining microarchitecture of digital blocks involving microcontroller-based designs to meet specifications, optimized for performance metrics of timing, area, and power.-Lead and also hands-on end-to-end ASIC design including RTL implementation and design processes of...

Job Description:Roles & Responsibilities:Exp- 12 - 16 yrs The role requires the management of a SerDes DV group focusing on MDV verification including: Constrained Random Functional Verification, Formal Property Verification, project DV status and execution, and mentorship of junior engineers.The role requires the ability to work with the existing functional...

Job Description: Roles & Responsibilities: Exp- 12 - 16 yrs The role requires the management of a SerDes DV group focusing on MDV verification including: Constrained Random Functional Verification, Formal Property Verification, project DV status and execution, and mentorship of junior engineers. The role requires the ability to work with the existing...

Position Summary - Design, development & verification of H/W IP for camera, multimedia and display pipelines in smartphones Role and Responsibilities - Strong fundamentals in VLSI design, coding and verification - Hands-on experience in Verilog/System Verilog/VHDL - Writing RTL code for IP development/RTL integration, checking the code for Lint/CDC issues,...

Be part of the Cadence High-Speed SerDes PHY IP Front end Design team responsible for - -Defining microarchitecture of digital blocks involving microcontroller-based designs to meet specifications, optimized for performance metrics of timing, area, and power.-Lead and also hands-on end-to-end ASIC design including RTL implementation and design processes of...

Be part of the Cadence High-Speed SerDes PHY IP Front end Design team responsible for - -Defining microarchitecture of digital blocks involving microcontroller-based designs to meet specifications, optimized for performance metrics of timing, area, and power. -Lead and also hands-on end-to-end ASIC design including RTL implementation and design processes of...

- Design & synthesize for a complex SerDes IPs in various technology nodes (> 100G rates)- Work with Analog design teams to co-develop algorithms, feedback design loops as well as high speed critical digital circuits- Good understanding of working with signal processing IPs in terms of knowing calibrations, PLLs, dividers, FIFO design and reset distribution-...

Job Description- Synthesis, Equivalence Checking, Clock-Domain Crossing (CDC) Analysis, Area/Power optimizations, Linting, Static Timing Analysis (STA)- Write design specifications for different functional blocks on a chip, Create micro-architecture diagrams of functional blocks, Design functional blocks using System Verilog RTL code, conduct Synthesis and...

Design & synthesize for a complex SerDes IPs in various technology nodes (> 100G rates)Work with Analog design teams to co-develop algorithms, feedback design loops as well as high speed critical digital circuitsGood understanding of working with signal processing IPs in terms of knowing calibrations, PLLs, dividers, FIFO design and reset...

Design & synthesize for a complex SerDes IPs in various technology nodes (> 100G rates)Work with Analog design teams to co-develop algorithms, feedback design loops as well as high speed critical digital circuitsGood understanding of working with signal processing IPs in terms of knowing calibrations, PLLs, dividers, FIFO design and reset...

Design & synthesize for a complex SerDes IPs in various technology nodes (> 100G rates) Work with Analog design teams to co-develop algorithms, feedback design loops as well as high speed critical digital circuits Good understanding of working with signal processing IPs in terms of knowing calibrations, PLLs, dividers, FIFO design and reset distribution...

About CompanyAt 7Rays Semiconductors ( we provide end-to-end VLSI design solutions to help our clients achieve execution excellence. Our team of experts specializes in architecture, RTL design, verification, validation, physical design, implementation, and post-silicon validation using the latest technologies and methodologiesWe work closely with our...

AndGateInformatics Pvt. Ltd. is a technology solutions and recruitmentcompany based in Bengaluru. Founded by industry professionals withextensive experience in Semiconductor IT/Software and Recruitment& Staffing AndGate Informatics serves clients in IndiaMalaysia Singapore Vietnam Taiwan US and UK. With a global team wespecialize in domains such as ASIC...

Position Summary We are currently looking for exceptional Senior hardware/RTL design talent to join our SSIR team for GPU Development. Role and Responsibilities As Senior engineers in the GPU RTL design team, you will work as part of a GPU IP development tasked with driving the RTL design of various sub-blocks for a GPU targeted to mobile market as well...

Job DescriptionAndGate Informatics Pvt. Ltd. is a technology solutions and recruitment company based in Bengaluru. Founded by industry professionals with extensive experience in Semiconductor, IT/Software, and Recruitment & Staffing, AndGate Informatics serves clients in India, Malaysia, Singapore, Vietnam, Taiwan, US, and UK. With a global team, we...

Dew Software, a leading player in the Digital Transformation space, is seeking a skilled DFD RTL Engineer to join our team. Working with Fortune 500 companies to support their digital innovation and transformation strategies, the DFD RTL Engineer will be responsible for the design and development of RTL (Register Transfer Level) circuits and systems. Dew...