Senior Staff Engineer/Verification Engineer

4 weeks ago


Bangalore, India ConnectPro Management Consultants Pvt Ltd. Full time

Location preference : Bangalore.

Work experience : 8+ years.


Job Description :

- Develop verification plan by understanding requirement.

- Create constrained random verification ENV/ TB architecture usingSystem verilog & UVM.

- Exposed to Power aware simulation & GLS.

- Formal verification & Assertion will be added advantage.

- Execute coverage plan & code cov closure.

- Exposure to AMS verification.

- Experience in scripting languages like Perl, Python.

- DV candidate with experience in IP/ SOC/ Sub-System Verification and responsible to Develop verification plan by understanding :


- Develop verification plans based on requirements analysis, ensuring comprehensive coverage of design features and functionalities.


- Design and implement constrained-random verification environments and testbench architectures using SystemVerilog and UVM methodology.


- Utilize power-aware simulation techniques to verify low-power designs and ensure power management functionality correctness.


- Incorporate formal verification methods and assertion-based verification to enhance verification completeness and efficiency.


- Execute verification activities including simulation, debugging, and analysis to achieve coverage goals and closure.


- Collaborate closely with design and architecture teams to understand design specifications and resolve verification issues.


- Drive the development and execution of coverage plans to ensure adequate verification of design features.


- Work with AMS (Analog Mixed-Signal) verification methodologies and tools to verify mixed-signal components of the design.


- Develop and maintain verification scripts and utilities using scripting languages like Perl and Python to automate verification tasks.


- Mentor junior verification engineers, providing guidance and technical expertise to ensure project success.

(ref:hirist.tech)

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