ASIC Design Verification Engineer
3 weeks ago
ASIC Verification EngineerExperience: 4+ YearsResponsibilities:You will be exposed to the latest verification methodologies like UVM and enable complex feature verification suites.Architect and Develop block level verification environments for sub-system and fullchip using System Verilog and UVM methodology. (30%)Define, architect, code, and deliver verification suites/tests for ASICs that enable faster, denser, feature-rich systems. Use various front-end simulator tools (VCS/NC) to perform this activity. (25)Verify large ASIC blocks independently and rapidly and sign off them for tape-out with analysis of code coverage, functional coverage and Gate level simulation. (30%)Work closely with logic designers to resolve bugs and software developers to assist in software and bring-up development. (10%)Develop Perl, Python and/or shell scripts to improve current verification infrastructure/methodology (5%)Required Skills:ASIC Verification using SystemVerilogExperience in constrained-random verification is a strong plusExperience with verification methodology like OVM/VMM/UVMPerl/Tcl scripting is strongly preferredExperience verifying networking protocols such as Ethernet is desirableStrong problem solving and ASIC debugging skillsMSEE or BSEE is required with at least 5 years of ASIC Verification Experience.
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ASIC Design verification engineer
16 hours ago
Bengaluru, Karnataka, India Chiplogic Technologies Full time ₹ 9,00,000 - ₹ 12,00,000 per yearRole DescriptionThis is a full-time on-site role for an ASIC Design Verification Engineer located in Bengaluru. The engineer will be responsible for formal verification, RTL design, computer architecture, functional verification, and debugging. Day-to-day tasks include verifying ASIC designs, ensuring functional accuracy, debugging any issues, and...
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ASIC Design Verification Engineer
2 weeks ago
Bengaluru, India HPE Aruba Networking Full timeASIC Verification Engineer Experience: 4+ Years Responsibilities: - You will be exposed to the latest verification methodologies like UVM and enable complex feature verification suites. - Architect and Develop block level verification environments for sub-system and fullchip using System Verilog and UVM methodology. (30%) - Define, architect, code, and...
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ASIC Design Verification Engineer
3 weeks ago
Bengaluru, India HPE Aruba Networking Full timeASIC Verification Engineer Experience: 4+ Years Responsibilities: You will be exposed to the latest verification methodologies like UVM and enable complex feature verification suites. Architect and Develop block level verification environments for sub-system and fullchip using System Verilog and UVM methodology. (30%) Define, architect, code, and deliver...
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ASIC Design Verification Engineer
2 weeks ago
Bengaluru, India HPE Aruba Networking Full timeASIC Verification Engineer Experience: 4+ Years Responsibilities: You will be exposed to the latest verification methodologies like UVM and enable complex feature verification suites. Architect and Develop block level verification environments for sub-system and fullchip using System Verilog and UVM methodology. (30%) Define, architect, code, and deliver...
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ASIC Design Verification Engineer
2 weeks ago
Bengaluru, India HPE Aruba Networking Full timeASIC Verification Engineer Experience: 4+ Years Responsibilities: You will be exposed to the latest verification methodologies like UVM and enable complex feature verification suites. Architect and Develop block level verification environments for sub-system and fullchip using System Verilog and UVM methodology. (30%) Define, architect, code, and deliver...
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ASIC Design Verification Engineer
2 weeks ago
Bengaluru, India HPE Aruba Networking Full timeASIC Verification Engineer Experience: 4+ Years Responsibilities:You will be exposed to the latest verification methodologies like UVM and enable complex feature verification suites.Architect and Develop block level verification environments for sub-system and fullchip using System Verilog and UVM methodology. (30%)Define, architect, code, and deliver...
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ASIC Design Verification Engineer
2 weeks ago
Bengaluru, India HPE Aruba Networking Full timeASIC Verification Engineer Experience: 4+ Years Responsibilities:You will be exposed to the latest verification methodologies like UVM and enable complex feature verification suites.Architect and Develop block level verification environments for sub-system and fullchip using System Verilog and UVM methodology. (30%)Define, architect, code, and deliver...
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ASIC Design Verification Engineer
2 weeks ago
Bengaluru, India HPE Aruba Networking Full timeASIC Verification Engineer Experience: 4+ Years Responsibilities:You will be exposed to the latest verification methodologies like UVM and enable complex feature verification suites.Architect and Develop block level verification environments for sub-system and fullchip using System Verilog and UVM methodology. (30%)Define, architect, code, and deliver...
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Senior design verification engineer
4 weeks ago
Bengaluru, India Prodapt ASIC Services Full timeKey job responsibilities: As a Senior Design Verification Engineer, you will define verification methodology and implement the corresponding verification plan for the So C. You will participate in the design verification and bring-up of the So C by writing relevant tests, coverages, assertions, developing automation infrastructure, debugging code, test...
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ASIC Design Verification Engineer
4 days ago
Bengaluru, Karnataka, India Cisco Full time ₹ 20,00,000 - ₹ 25,00,000 per year*ASIC Design Verification Engineer - ( SystemVerilog, UVM test bench, C/C++ , Perl/Python scripting, (VCS, DVE, Verdi), TCL/Shell scripting) | 10+ years**Meet the Team*Join our dynamic front-end design team at Cisco Silicon One, where innovation meetsinnovative technology As part of the heart of silicon development at Cisco, you'llengage in every facet of...
