Design Verification Engineer

2 weeks ago

Bengaluru, India Sintegra Inc. Full time

We are seeking a skilled and motivated Design Verification Engineer (DV) with expertise in Ethernet protocols, MAC layer functionality, and RoCE (RDMA over Converged Ethernet). The ideal candidate will have hands-on experience with Synopsys Ethernet PHY and controller IPs, and a strong understanding of high-performance networking technologies.Key Responsibilities- Develop and execute verification plans for Ethernet MAC and PHY IP blocks- Design and implement testbenches using industry-standard methodologies (UVM, SystemVerilog)- Validate RoCE protocol implementations for low-latency, high-throughput data

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